diff options
| author | Shengzhou Liu <Shengzhou.Liu@nxp.com> | 2016-09-01 14:50:36 +0800 |
|---|---|---|
| committer | York Sun <york.sun@nxp.com> | 2016-09-14 14:08:15 -0700 |
| commit | 93a6d3284ca635496c6de097e49cadc8f62e6256 (patch) | |
| tree | ae55aeca2e29d0c1e6d6321cbdb6606bf253645e /board/freescale/ls1021atwr | |
| parent | 214ffae02d03cd548549c6390eb9c19b9e6b085f (diff) | |
armv7:ls1021a: Enable workaround for DDR erratum A-009942
Signed-off-by: Shengzhou Liu <Shengzhou.Liu@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
Diffstat (limited to 'board/freescale/ls1021atwr')
| -rw-r--r-- | board/freescale/ls1021atwr/ls1021atwr.c | 7 |
1 files changed, 6 insertions, 1 deletions
diff --git a/board/freescale/ls1021atwr/ls1021atwr.c b/board/freescale/ls1021atwr/ls1021atwr.c index 4638bed478..d96fd774d3 100644 --- a/board/freescale/ls1021atwr/ls1021atwr.c +++ b/board/freescale/ls1021atwr/ls1021atwr.c @@ -142,7 +142,7 @@ int checkboard(void) void ddrmc_init(void) { struct ccsr_ddr *ddr = (struct ccsr_ddr *)CONFIG_SYS_FSL_DDR_ADDR; - u32 temp_sdram_cfg; + u32 temp_sdram_cfg, tmp; out_be32(&ddr->sdram_cfg, DDR_SDRAM_CFG); @@ -189,6 +189,11 @@ void ddrmc_init(void) out_be32(&ddr->ddr_zq_cntl, DDR_DDR_ZQ_CNTL); out_be32(&ddr->cs0_config_2, DDR_CS0_CONFIG_2); + + /* DDR erratum A-009942 */ + tmp = in_be32(&ddr->debug[28]); + out_be32(&ddr->debug[28], tmp | 0x0070006f); + udelay(1); #ifdef CONFIG_DEEP_SLEEP |