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| author | Simon Glass <sjg@chromium.org> | 2015-07-03 18:28:21 -0600 |
|---|---|---|
| committer | Simon Glass <sjg@chromium.org> | 2015-07-14 18:03:19 -0600 |
| commit | e1e332c8f2e5cac70566998a0ba0ccfdea437f10 (patch) | |
| tree | 0c3abcb9110ea2a766a6cc455464397834e406d9 /board/freescale/mpc8315erdb | |
| parent | a452002259e172c93277dbe5752817e0732afe78 (diff) | |
dm: spi: Correct status register access width
The status register on ICH9 is a single byte, so use byte access when
writing to it, to avoid updating the control register also.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Jagan Teki <jteki@openedev.com>
Diffstat (limited to 'board/freescale/mpc8315erdb')
0 files changed, 0 insertions, 0 deletions