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authorRoy Zang <tie-fei.zang@freescale.com>2009-01-09 16:00:55 +0800
committerAndrew Fleming-AFLEMING <afleming@freescale.com>2009-01-13 16:32:52 -0600
commit9afc2ef0307aecf52482df67c31b75d5f9e66b47 (patch)
tree4a505a5550254c3949d104f1fbc2b535759ca2ee /board/freescale/mpc8544ds
parent950309c6436ff78d2166377da34bfdb0ae00a4a4 (diff)
Fix IO port selection issue on MPC8544DS and MPC8572DS boards
The IO port selection is not correct on MPC8572DS and MPC8544DS board. This patch fixes this issue. For MPC8572 Port cfg_io_ports PCIE1 0x2, 0x3, 0x7, 0xb, 0xc, 0xf PCIE2 0x3, 0x7 PCIE3 0x7 For MPC8544 Port cfg_io_ports PCIE1 0x2, 0x3, 0x4, 0x5, 0x6, 0x7 PCIE2 0x4, 0x5, 0x6, 0x7 PCIE3 0x6, 0x7 Signed-off-by: Roy Zang <tie-fei.zang@freescale.com>
Diffstat (limited to 'board/freescale/mpc8544ds')
-rw-r--r--board/freescale/mpc8544ds/mpc8544ds.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/board/freescale/mpc8544ds/mpc8544ds.c b/board/freescale/mpc8544ds/mpc8544ds.c
index 14581abdd8..13c55fd37f 100644
--- a/board/freescale/mpc8544ds/mpc8544ds.c
+++ b/board/freescale/mpc8544ds/mpc8544ds.c
@@ -121,7 +121,7 @@ pci_init_board(void)
volatile ccsr_fsl_pci_t *pci = (ccsr_fsl_pci_t *) CONFIG_SYS_PCIE3_ADDR;
struct pci_controller *hose = &pcie3_hose;
int pcie_ep = (host_agent == 1);
- int pcie_configured = io_sel >= 1;
+ int pcie_configured = io_sel >= 6;
struct pci_region *r = hose->regions;
if (pcie_configured && !(devdisr & MPC85xx_DEVDISR_PCIE)){