diff options
| author | Kumar Gala <galak@kernel.crashing.org> | 2008-12-02 14:19:33 -0600 |
|---|---|---|
| committer | Andrew Fleming-AFLEMING <afleming@freescale.com> | 2009-01-23 17:03:13 -0600 |
| commit | 52b565f5ad23b682489055b187767d8bf1c2e444 (patch) | |
| tree | f7e62f88a22deb0dcabe2b6c3ac85276d39cd907 /board/freescale/mpc8572ds/law.c | |
| parent | 30837e5b21d5a742983581ab9ee3fac085311d19 (diff) | |
85xx: separate PIXIS virtual from physical address
Added a PIXIS_BASE_PHYS for use as the physical address and maintain
PIXIS_BASE as the virtual address of the PIXIS fpga registers.
This allows us to deal with 36-bit phys on these boards in the future.
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Acked-by: Andy Fleming <afleming@freescale.com>
Diffstat (limited to 'board/freescale/mpc8572ds/law.c')
| -rw-r--r-- | board/freescale/mpc8572ds/law.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/board/freescale/mpc8572ds/law.c b/board/freescale/mpc8572ds/law.c index 83eb6811c0..9814479f62 100644 --- a/board/freescale/mpc8572ds/law.c +++ b/board/freescale/mpc8572ds/law.c @@ -35,7 +35,7 @@ struct law_entry law_table[] = { SET_LAW(CONFIG_SYS_PCIE2_IO_PHYS, LAW_SIZE_64K, LAW_TRGT_IF_PCIE_2), SET_LAW(CONFIG_SYS_PCIE3_MEM_PHYS, LAWAR_SIZE_512M, LAW_TRGT_IF_PCIE_3), SET_LAW(CONFIG_SYS_PCIE3_IO_PHYS, LAW_SIZE_64K, LAW_TRGT_IF_PCIE_3), - SET_LAW(PIXIS_BASE, LAW_SIZE_4K, LAW_TRGT_IF_LBC), + SET_LAW(PIXIS_BASE_PHYS, LAW_SIZE_4K, LAW_TRGT_IF_LBC), SET_LAW(CONFIG_SYS_NAND_BASE_PHYS, LAW_SIZE_1M, LAW_TRGT_IF_LBC), }; |