diff options
| author | Dirk Behme <dirk.behme@de.bosch.com> | 2012-04-12 20:46:14 +0000 |
|---|---|---|
| committer | Albert ARIBAUD <albert.u.boot@aribaud.net> | 2012-04-17 15:41:22 +0200 |
| commit | 03f3587822839d90b1b118d3cd51c59d8b4d5b32 (patch) | |
| tree | b97f9f4b0fd8160339a223544285a72479b7af71 /board/freescale/mx6qarm2/imximage.cfg | |
| parent | f5cdc11775c4b7fdbf52a6dd2f463d329804ab11 (diff) | |
i.MX6: arm2: Add AXI cache and Qos setting
Do the same AXI cache and Qos settings done already in the
SabreLite imximage.cfg for the ARM2 board, too.
It fixes a display flash issue caused by low priority of
the display IDMA channel.
Signed-off-by: Dirk Behme <dirk.behme@de.bosch.com>
CC: Jason Chen <b02280@freescale.com>
CC: Jason Liu <r64343@freescale.com>
CC: Stefano Babic <sbabic@denx.de>
CC: Fabio Estevam <festevam@gmail.com>
Acked-by: Jason Liu <r64343@freescale.com>
Diffstat (limited to 'board/freescale/mx6qarm2/imximage.cfg')
| -rw-r--r-- | board/freescale/mx6qarm2/imximage.cfg | 6 |
1 files changed, 6 insertions, 0 deletions
diff --git a/board/freescale/mx6qarm2/imximage.cfg b/board/freescale/mx6qarm2/imximage.cfg index 5f0ee0d190..ceecbf925d 100644 --- a/board/freescale/mx6qarm2/imximage.cfg +++ b/board/freescale/mx6qarm2/imximage.cfg @@ -165,3 +165,9 @@ DATA 4 0x020c4074 0x3FF00000 DATA 4 0x020c4078 0x00FFF300 DATA 4 0x020c407c 0x0F0000C3 DATA 4 0x020c4080 0x000003FF + +# enable AXI cache for VDOA/VPU/IPU +DATA 4 0x020e0010 0xF00000FF +# set IPU AXI-id0 Qos=0xf(bypass) AXI-id1 Qos=0x7 +DATA 4 0x020e0018 0x007F007F +DATA 4 0x020e001c 0x007F007F |