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authorBreno Lima <breno.lima@nxp.com>2017-08-24 10:00:16 -0300
committerStefano Babic <sbabic@denx.de>2017-08-28 09:48:53 +0200
commit3aa4b703b483f165dd2eb5c3324b44b60fbb1672 (patch)
treebe47799cc857c58710a5e6bac7a76e116240a636 /board/freescale/mx6sabreauto
parent962c78b1dfa6cd69333cad52c9298a3e1f85f606 (diff)
imx: imx6: Move gpr_init() function to soc.c
Since the gpr_init() function is common for boards using MX6S, MX6DL, MX6D, MX6Q and MX6QP processors move it to the soc.c file. Signed-off-by: Breno Lima <breno.lima@nxp.com> Acked-by: Stefano Babic <sbabic@denx.de> Reviewed-by: Lukasz Majewski <lukma@denx.de> Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com>
Diffstat (limited to 'board/freescale/mx6sabreauto')
-rw-r--r--board/freescale/mx6sabreauto/mx6sabreauto.c17
1 files changed, 0 insertions, 17 deletions
diff --git a/board/freescale/mx6sabreauto/mx6sabreauto.c b/board/freescale/mx6sabreauto/mx6sabreauto.c
index f8f77f616c..15ca0294f5 100644
--- a/board/freescale/mx6sabreauto/mx6sabreauto.c
+++ b/board/freescale/mx6sabreauto/mx6sabreauto.c
@@ -798,23 +798,6 @@ static void ccgr_init(void)
writel(0x000003FF, &ccm->CCGR6);
}
-static void gpr_init(void)
-{
- struct iomuxc *iomux = (struct iomuxc *)IOMUXC_BASE_ADDR;
-
- /* enable AXI cache for VDOA/VPU/IPU */
- writel(0xF00000CF, &iomux->gpr[4]);
- if (is_mx6dqp()) {
- /* set IPU AXI-id1 Qos=0x1 AXI-id0/2/3 Qos=0x7 */
- writel(0x77177717, &iomux->gpr[6]);
- writel(0x77177717, &iomux->gpr[7]);
- } else {
- /* set IPU AXI-id0 Qos=0xf(bypass) AXI-id1 Qos=0x7 */
- writel(0x007F007F, &iomux->gpr[6]);
- writel(0x007F007F, &iomux->gpr[7]);
- }
-}
-
static int mx6q_dcd_table[] = {
0x020e0798, 0x000C0000,
0x020e0758, 0x00000000,