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authorFabio Estevam <fabio.estevam@nxp.com>2016-03-11 10:50:22 -0300
committerTom Rini <trini@konsulko.com>2016-03-13 09:50:02 -0400
commitae765f3a8243faa39d4a32ba2baede638e40c768 (patch)
tree3948e1ce069824b3c832c379ba424fd96e35b512 /board/freescale/mx6slevk/mx6slevk.c
parentea9619aed6908e83b0679bd9c9aa4ae97714ef97 (diff)
mx6slevk: Fix the power up of the Ethernet PHY
GPIO4_21 is the LAN8720 power pin, not the LAN8720 reset pin. Fix that, so that we can have Ethernet functional again. Reviewed-by: Tom Rini <trini@konsulko.com> Signed-off-by: Fabio Estevam <fabio.estevam@nxp.com>
Diffstat (limited to 'board/freescale/mx6slevk/mx6slevk.c')
-rw-r--r--board/freescale/mx6slevk/mx6slevk.c9
1 files changed, 4 insertions, 5 deletions
diff --git a/board/freescale/mx6slevk/mx6slevk.c b/board/freescale/mx6slevk/mx6slevk.c
index 4f816c4c02..f440ce6196 100644
--- a/board/freescale/mx6slevk/mx6slevk.c
+++ b/board/freescale/mx6slevk/mx6slevk.c
@@ -57,7 +57,7 @@ DECLARE_GLOBAL_DATA_PTR;
PAD_CTL_DSE_80ohm | PAD_CTL_HYS | \
PAD_CTL_SRE_FAST)
-#define ETH_PHY_RESET IMX_GPIO_NR(4, 21)
+#define ETH_PHY_POWER IMX_GPIO_NR(4, 21)
int dram_init(void)
{
@@ -154,10 +154,9 @@ static void setup_iomux_fec(void)
{
imx_iomux_v3_setup_multiple_pads(fec_pads, ARRAY_SIZE(fec_pads));
- /* Reset LAN8720 PHY */
- gpio_direction_output(ETH_PHY_RESET , 0);
- udelay(25000);
- gpio_set_value(ETH_PHY_RESET, 1);
+ /* Power up LAN8720 PHY */
+ gpio_direction_output(ETH_PHY_POWER , 1);
+ udelay(15000);
}
#define USDHC1_CD_GPIO IMX_GPIO_NR(4, 7)