Merge remote-tracking branch 'u-boot/master'

4 files changed, 187 insertions, 86 deletions

diff --git a/board/freescale/mx6ul_14x14_evk/Kconfig b/board/freescale/mx6ul_14x14_evk/Kconfig
index 393aca629b..8210cd3cb8 100644
--- a/board/freescale/mx6ul_14x14_evk/Kconfig
+++ b/board/freescale/mx6ul_14x14_evk/Kconfig
@@ -1,4 +1,4 @@
-if TARGET_MX6UL_14X14_EVK
+if TARGET_MX6UL_14X14_EVK || TARGET_MX6UL_9X9_EVK
 
 config SYS_BOARD
 	default "mx6ul_14x14_evk"
@@ -6,9 +6,6 @@ config SYS_BOARD
 config SYS_VENDOR
 	default "freescale"
 
-config SYS_SOC
-	default "mx6"
-
 config SYS_CONFIG_NAME
 	default "mx6ul_14x14_evk"
 
diff --git a/board/freescale/mx6ul_14x14_evk/MAINTAINERS b/board/freescale/mx6ul_14x14_evk/MAINTAINERS
index 611feca106..d5f74b7ff4 100644
--- a/board/freescale/mx6ul_14x14_evk/MAINTAINERS
+++ b/board/freescale/mx6ul_14x14_evk/MAINTAINERS
@@ -4,3 +4,4 @@ S:	Maintained
 F:	board/freescale/mx6ul_14x14_evk/
 F:	include/configs/mx6ul_14x14_evk.h
 F:	configs/mx6ul_14x14_evk_defconfig
+F:	configs/mx6ul_9x9_evk_defconfig
diff --git a/board/freescale/mx6ul_14x14_evk/README b/board/freescale/mx6ul_14x14_evk/README
new file mode 100644
index 0000000000..d48c7ba20f
--- /dev/null
+++ b/board/freescale/mx6ul_14x14_evk/README
@@ -0,0 +1,32 @@
+How to use U-boot on Freescale MX6UL 14x14 EVK
+-----------------------------------------------
+
+- Build U-boot for MX6UL 14x14 EVK:
+
+$ make mrproper
+$ make mx6ul_14x14_evk_defconfig
+$ make
+
+This will generate the SPL image called SPL and the u-boot.img.
+
+- Flash the SPL image into the micro SD card:
+
+sudo dd if=SPL of=/dev/mmcblk0 bs=1k seek=1; sync
+
+- Flash the u-boot.img image into the micro SD card:
+
+sudo dd if=u-boot.img of=/dev/mmcblk0 bs=1k seek=69; sync
+
+- Jumper settings:
+
+SW601: 0 0 1 0
+Sw602: 1 0
+
+where 0 means bottom position and 1 means top position (from the
+switch label numbers reference).
+
+- Connect the USB cable between the EVK and the PC for the console.
+(The USB console connector is the one close the push buttons)
+
+- Insert the micro SD card in the board, power it up and U-boot messages should
+come up.
diff --git a/board/freescale/mx6ul_14x14_evk/mx6ul_14x14_evk.c b/board/freescale/mx6ul_14x14_evk/mx6ul_14x14_evk.c
index c09d84e540..8650f350f3 100644
--- a/board/freescale/mx6ul_14x14_evk/mx6ul_14x14_evk.c
+++ b/board/freescale/mx6ul_14x14_evk/mx6ul_14x14_evk.c
@@ -23,6 +23,9 @@
 #include <linux/sizes.h>
 #include <mmc.h>
 #include <netdev.h>
+#include <power/pmic.h>
+#include <power/pfuze3000_pmic.h>
+#include "../common/pfuze.h"
 #include <usb.h>
 #include <usb/ehci-fsl.h>
 
@@ -152,53 +155,10 @@ static void iox74lv_init(void)
 	gpio_direction_output(IOX_OE, 1);
 };
 
-void iox74lv_set(int index)
-{
-	int i;
-
-	gpio_direction_output(IOX_OE, 0);
-
-	for (i = 7; i >= 0; i--) {
-		gpio_direction_output(IOX_SHCP, 0);
-
-		if (i == index)
-			gpio_direction_output(IOX_SDI, seq[qn_output[i]][0]);
-		else
-			gpio_direction_output(IOX_SDI, seq[qn_output[i]][1]);
-		udelay(500);
-		gpio_direction_output(IOX_SHCP, 1);
-		udelay(500);
-	}
-
-	gpio_direction_output(IOX_STCP, 0);
-	udelay(500);
-	/*
-	 * shift register will be output to pins
-	 */
-	gpio_direction_output(IOX_STCP, 1);
-
-	for (i = 7; i >= 0; i--) {
-		gpio_direction_output(IOX_SHCP, 0);
-		gpio_direction_output(IOX_SDI, seq[qn_output[i]][1]);
-		udelay(500);
-		gpio_direction_output(IOX_SHCP, 1);
-		udelay(500);
-	}
-
-	gpio_direction_output(IOX_STCP, 0);
-	udelay(500);
-	/*
-	 * shift register will be output to pins
-	 */
-	gpio_direction_output(IOX_STCP, 1);
-
-	gpio_direction_output(IOX_OE, 1);
-};
-
 #ifdef CONFIG_SYS_I2C_MXC
 #define PC MUX_PAD_CTRL(I2C_PAD_CTRL)
 /* I2C1 for PMIC and EEPROM */
-struct i2c_pads_info i2c_pad_info1 = {
+static struct i2c_pads_info i2c_pad_info1 = {
 	.scl = {
 		.i2c_mode =  MX6_PAD_UART4_TX_DATA__I2C1_SCL | PC,
 		.gpio_mode = MX6_PAD_UART4_TX_DATA__GPIO1_IO28 | PC,
@@ -210,11 +170,56 @@ struct i2c_pads_info i2c_pad_info1 = {
 		.gp = IMX_GPIO_NR(1, 29),
 	},
 };
+
+#ifdef CONFIG_POWER
+#define I2C_PMIC       0
+int power_init_board(void)
+{
+	if (is_mx6ul_9x9_evk()) {
+		struct pmic *pfuze;
+		int ret;
+		unsigned int reg, rev_id;
+
+		ret = power_pfuze3000_init(I2C_PMIC);
+		if (ret)
+			return ret;
+
+		pfuze = pmic_get("PFUZE3000");
+		ret = pmic_probe(pfuze);
+		if (ret)
+			return ret;
+
+		pmic_reg_read(pfuze, PFUZE3000_DEVICEID, &reg);
+		pmic_reg_read(pfuze, PFUZE3000_REVID, &rev_id);
+		printf("PMIC: PFUZE3000 DEV_ID=0x%x REV_ID=0x%x\n",
+		       reg, rev_id);
+
+		/* disable Low Power Mode during standby mode */
+		pmic_reg_read(pfuze, PFUZE3000_LDOGCTL, &reg);
+		reg |= 0x1;
+		pmic_reg_write(pfuze, PFUZE3000_LDOGCTL, reg);
+
+		/* SW1B step ramp up time from 2us to 4us/25mV */
+		reg = 0x40;
+		pmic_reg_write(pfuze, PFUZE3000_SW1BCONF, reg);
+
+		/* SW1B mode to APS/PFM */
+		reg = 0xc;
+		pmic_reg_write(pfuze, PFUZE3000_SW1BMODE, reg);
+
+		/* SW1B standby voltage set to 0.975V */
+		reg = 0xb;
+		pmic_reg_write(pfuze, PFUZE3000_SW1BSTBY, reg);
+	}
+
+	return 0;
+}
+#endif
 #endif
 
 int dram_init(void)
 {
-	gd->ram_size = PHYS_SDRAM_SIZE;
+	gd->ram_size = imx_ddr_size();
 
 	return 0;
 }
@@ -308,7 +313,7 @@ static iomux_v3_cfg_t const quadspi_pads[] = {
 	MX6_PAD_NAND_DQS__QSPI_A_SS0_B | MUX_PAD_CTRL(QSPI_PAD_CTRL1),
 };
 
-int board_qspi_init(void)
+static int board_qspi_init(void)
 {
 	/* Set the iomux */
 	imx_iomux_v3_setup_multiple_pads(quadspi_pads,
@@ -614,17 +619,24 @@ int board_late_init(void)
 	add_board_boot_modes(board_boot_modes);
 #endif
 
-	return 0;
-}
+#ifdef CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG
+	setenv("board_name", "EVK");
 
-u32 get_board_rev(void)
-{
-	return get_cpu_rev();
+	if (is_mx6ul_9x9_evk())
+		setenv("board_rev", "9X9");
+	else
+		setenv("board_rev", "14X14");
+#endif
+
+	return 0;
 }
 
 int checkboard(void)
 {
-	puts("Board: MX6UL 14x14 EVK\n");
+	if (is_mx6ul_9x9_evk())
+		puts("Board: MX6UL 9x9 EVK\n");
+	else
+		puts("Board: MX6UL 14x14 EVK\n");
 
 	return 0;
 }
@@ -634,7 +646,76 @@ int checkboard(void)
 #include <spl.h>
 #include <asm/arch/mx6-ddr.h>
 
-const struct mx6ul_iomux_ddr_regs mx6_ddr_ioregs = {
+
+static struct mx6ul_iomux_grp_regs mx6_grp_ioregs = {
+	.grp_addds = 0x00000030,
+	.grp_ddrmode_ctl = 0x00020000,
+	.grp_b0ds = 0x00000030,
+	.grp_ctlds = 0x00000030,
+	.grp_b1ds = 0x00000030,
+	.grp_ddrpke = 0x00000000,
+	.grp_ddrmode = 0x00020000,
+#ifdef CONFIG_TARGET_MX6UL_9X9_EVK
+	.grp_ddr_type = 0x00080000,
+#else
+	.grp_ddr_type = 0x000c0000,
+#endif
+};
+
+#ifdef CONFIG_TARGET_MX6UL_9X9_EVK
+static struct mx6ul_iomux_ddr_regs mx6_ddr_ioregs = {
+	.dram_dqm0 = 0x00000030,
+	.dram_dqm1 = 0x00000030,
+	.dram_ras = 0x00000030,
+	.dram_cas = 0x00000030,
+	.dram_odt0 = 0x00000000,
+	.dram_odt1 = 0x00000000,
+	.dram_sdba2 = 0x00000000,
+	.dram_sdclk_0 = 0x00000030,
+	.dram_sdqs0 = 0x00003030,
+	.dram_sdqs1 = 0x00003030,
+	.dram_reset = 0x00000030,
+};
+
+static struct mx6_mmdc_calibration mx6_mmcd_calib = {
+	.p0_mpwldectrl0 = 0x00000000,
+	.p0_mpdgctrl0 = 0x20000000,
+	.p0_mprddlctl = 0x4040484f,
+	.p0_mpwrdlctl = 0x40405247,
+	.mpzqlp2ctl = 0x1b4700c7,
+};
+
+static struct mx6_lpddr2_cfg mem_ddr = {
+	.mem_speed = 800,
+	.density = 2,
+	.width = 16,
+	.banks = 4,
+	.rowaddr = 14,
+	.coladdr = 10,
+	.trcd_lp = 1500,
+	.trppb_lp = 1500,
+	.trpab_lp = 2000,
+	.trasmin = 4250,
+};
+
+struct mx6_ddr_sysinfo ddr_sysinfo = {
+	.dsize = 0,
+	.cs_density = 18,
+	.ncs = 1,
+	.cs1_mirror = 0,
+	.walat = 0,
+	.ralat = 5,
+	.mif3_mode = 3,
+	.bi_on = 1,
+	.rtt_wr = 0,        /* LPDDR2 does not need rtt_wr rtt_nom */
+	.rtt_nom = 0,
+	.sde_to_rst = 0,    /* LPDDR2 does not need this field */
+	.rst_to_cke = 0x10, /* JEDEC value for LPDDR2: 200us */
+	.ddr_type = DDR_TYPE_LPDDR2,
+};
+
+#else
+static struct mx6ul_iomux_ddr_regs mx6_ddr_ioregs = {
 	.dram_dqm0 = 0x00000030,
 	.dram_dqm1 = 0x00000030,
 	.dram_ras = 0x00000030,
@@ -648,24 +729,29 @@ const struct mx6ul_iomux_ddr_regs mx6_ddr_ioregs = {
 	.dram_reset = 0x00000030,
 };
 
-const struct mx6ul_iomux_grp_regs mx6_grp_ioregs = {
-	.grp_addds = 0x00000030,
-	.grp_ddrmode_ctl = 0x00020000,
-	.grp_b0ds = 0x00000030,
-	.grp_ctlds = 0x00000030,
-	.grp_b1ds = 0x00000030,
-	.grp_ddrpke = 0x00000000,
-	.grp_ddrmode = 0x00020000,
-	.grp_ddr_type = 0x000c0000,
-};
-
-const struct mx6_mmdc_calibration mx6_mmcd_calib = {
+static struct mx6_mmdc_calibration mx6_mmcd_calib = {
 	.p0_mpwldectrl0 = 0x00070007,
 	.p0_mpdgctrl0 = 0x41490145,
 	.p0_mprddlctl = 0x40404546,
 	.p0_mpwrdlctl = 0x4040524D,
 };
 
+struct mx6_ddr_sysinfo ddr_sysinfo = {
+	.dsize = 0,
+	.cs_density = 20,
+	.ncs = 1,
+	.cs1_mirror = 0,
+	.rtt_wr = 2,
+	.rtt_nom = 1,		/* RTT_Nom = RZQ/2 */
+	.walat = 1,		/* Write additional latency */
+	.ralat = 5,		/* Read additional latency */
+	.mif3_mode = 3,		/* Command prediction working mode */
+	.bi_on = 1,		/* Bank interleaving enabled */
+	.sde_to_rst = 0x10,	/* 14 cycles, 200us (JEDEC default) */
+	.rst_to_cke = 0x23,	/* 33 cycles, 500us (JEDEC default) */
+	.ddr_type = DDR_TYPE_DDR3,
+};
+
 static struct mx6_ddr3_cfg mem_ddr = {
 	.mem_speed = 800,
 	.density = 4,
@@ -678,6 +764,7 @@ static struct mx6_ddr3_cfg mem_ddr = {
 	.trcmin = 4875,
 	.trasmin = 3500,
 };
+#endif
 
 static void ccgr_init(void)
 {
@@ -695,24 +782,8 @@ static void ccgr_init(void)
 
 static void spl_dram_init(void)
 {
-	struct mx6_ddr_sysinfo sysinfo = {
-		.dsize = 0,
-		.cs_density = 20,
-		.ncs = 1,
-		.cs1_mirror = 0,
-		.rtt_wr = 2,
-		.rtt_nom = 1,		/* RTT_Nom = RZQ/2 */
-		.walat = 1,		/* Write additional latency */
-		.ralat = 5,		/* Read additional latency */
-		.mif3_mode = 3,		/* Command prediction working mode */
-		.bi_on = 1,		/* Bank interleaving enabled */
-		.sde_to_rst = 0x10,	/* 14 cycles, 200us (JEDEC default) */
-		.rst_to_cke = 0x23,	/* 33 cycles, 500us (JEDEC default) */
-		.ddr_type = DDR_TYPE_DDR3,
-	};
-
 	mx6ul_dram_iocfg(mem_ddr.width, &mx6_ddr_ioregs, &mx6_grp_ioregs);
-	mx6_dram_cfg(&sysinfo, &mx6_mmcd_calib, &mem_ddr);
+	mx6_dram_cfg(&ddr_sysinfo, &mx6_mmcd_calib, &mem_ddr);
 }
 
 void board_init_f(ulong dummy)