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authorTom Rini <trini@konsulko.com>2017-12-08 12:02:01 -0500
committerTom Rini <trini@konsulko.com>2017-12-08 12:02:01 -0500
commit335f7b1290ce24a729a9689a1db834c743226ca8 (patch)
treec423842792692c79e4aad476a1c89e6266f2c2bb /board/freescale/p1022ds/tlb.c
parent48f0e6bb376942414320a8a086a641c9f73d1745 (diff)
parent316f0d0f8f3cbeeefda043e69f3e4e6aa57f7f1d (diff)
Merge git://git.denx.de/u-boot-mpc85xx
Diffstat (limited to 'board/freescale/p1022ds/tlb.c')
-rw-r--r--board/freescale/p1022ds/tlb.c4
1 files changed, 2 insertions, 2 deletions
diff --git a/board/freescale/p1022ds/tlb.c b/board/freescale/p1022ds/tlb.c
index e7ae2e25b2..69d5e449e0 100644
--- a/board/freescale/p1022ds/tlb.c
+++ b/board/freescale/p1022ds/tlb.c
@@ -75,12 +75,12 @@ struct fsl_e_tlb_entry tlb_table[] = {
(defined(CONFIG_SPL) && !defined(CONFIG_SPL_COMMON_INIT_DDR))
/* **** - eSDHC/eSPI/NAND boot */
SET_TLB_ENTRY(1, CONFIG_SYS_DDR_SDRAM_BASE, CONFIG_SYS_DDR_SDRAM_BASE,
- MAS3_SX|MAS3_SW|MAS3_SR, 0,
+ MAS3_SX|MAS3_SW|MAS3_SR, MAS2_M,
0, 8, BOOKE_PAGESZ_1G, 1),
/* **** - eSDHC/eSPI/NAND boot - second 1GB of memory */
SET_TLB_ENTRY(1, CONFIG_SYS_DDR_SDRAM_BASE + 0x40000000,
CONFIG_SYS_DDR_SDRAM_BASE + 0x40000000,
- MAS3_SX|MAS3_SW|MAS3_SR, 0,
+ MAS3_SX|MAS3_SW|MAS3_SR, MAS2_M,
0, 9, BOOKE_PAGESZ_1G, 1),
#endif