powerpc/8xxx: Refactor fsl_ddr_get_spd into common code from board

Move fsl_ddr_get_spd into common mpc8xxx/ddr/main.c as most boards
pretty much do the same thing.  The only variations are in how many
controllers or DIMMs per controller exist.  To make this work we
standardize on the names of the SPD_EEPROM_ADDRESS defines based on the
use case of the board.

We allow boards to override get_spd to either do board specific fixups
to the SPD data or deal with any unique behavior of how the SPD eeproms
are wired up.

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>

1 files changed, 0 insertions, 18 deletions

diff --git a/board/freescale/p1022ds/ddr.c b/board/freescale/p1022ds/ddr.c
index 80c1d63200..20b996e52a 100644
--- a/board/freescale/p1022ds/ddr.c
+++ b/board/freescale/p1022ds/ddr.c
@@ -10,28 +10,10 @@
  */
 
 #include <common.h>
-#include <i2c.h>
 
 #include <asm/fsl_ddr_sdram.h>
 #include <asm/fsl_ddr_dimm_params.h>
 
-void fsl_ddr_get_spd(ddr3_spd_eeprom_t *ctrl_dimms_spd, unsigned int ctrl_num)
-{
-	int ret;
-
-	/*
-	 * The P1022 has only one DDR controller, and the board has only one
-	 * DIMM slot.
-	 */
-	ret = i2c_read(SPD_EEPROM_ADDRESS1, 0, 1, (u8 *)ctrl_dimms_spd,
-		       sizeof(ddr3_spd_eeprom_t));
-	if (ret) {
-		debug("DDR: failed to read SPD from address %u\n",
-		      SPD_EEPROM_ADDRESS1);
-		memset(ctrl_dimms_spd, 0, sizeof(ddr3_spd_eeprom_t));
-	}
-}
-
 typedef struct {
 	u32 datarate_mhz_low;
 	u32 datarate_mhz_high;