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authorMacpaul Lin <macpaul@andestech.com>2011-09-26 17:44:34 +0800
committerMacpaul Lin <macpaul@andestech.com>2011-11-09 16:35:27 +0800
commit2ba5b1d32433698a66c0548bbc9e0c867ab55be2 (patch)
tree9e917a01a0175b490b8d5447543aa5fe5ae036fc /board/freescale/p1_p2_rdb_pc
parent0f3864a966cc88ac90d8e403aa634254657d874d (diff)
dwcddr21mctl: Synopsys DWC DDR2/1 Memory Controller
Header definitions of Synopsys DWC DDR2/1 Memory Controller. Signed-off-by: Macpaul Lin <macpaul@andestech.com>
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