diff options
| author | Stefano Babic <sbabic@denx.de> | 2014-08-11 10:21:03 +0200 |
|---|---|---|
| committer | Stefano Babic <sbabic@denx.de> | 2014-08-11 10:21:03 +0200 |
| commit | e82abaeb7f2a0833fccf90460c48b9f2100258f8 (patch) | |
| tree | de701f5c90b7373966412d566b5c00d3837954bc /board/freescale/p1_twr | |
| parent | f93f21906e374d46c6abfbdf4eb9cb1ab51b6384 (diff) | |
| parent | 1899fac925eda817e12234aef3d01d354788662e (diff) | |
Merge branch 'master' of git://git.denx.de/u-boot-arm
Conflicts:
boards.cfg
Signed-off-by: Stefano Babic <sbabic@denx.de>
Diffstat (limited to 'board/freescale/p1_twr')
| -rw-r--r-- | board/freescale/p1_twr/Kconfig | 15 | ||||
| -rw-r--r-- | board/freescale/p1_twr/MAINTAINERS | 6 | ||||
| -rw-r--r-- | board/freescale/p1_twr/p1_twr.c | 12 |
3 files changed, 30 insertions, 3 deletions
diff --git a/board/freescale/p1_twr/Kconfig b/board/freescale/p1_twr/Kconfig new file mode 100644 index 0000000000..5fb47053c3 --- /dev/null +++ b/board/freescale/p1_twr/Kconfig @@ -0,0 +1,15 @@ +if TARGET_P1_TWR + +config SYS_BOARD + string + default "p1_twr" + +config SYS_VENDOR + string + default "freescale" + +config SYS_CONFIG_NAME + string + default "p1_twr" + +endif diff --git a/board/freescale/p1_twr/MAINTAINERS b/board/freescale/p1_twr/MAINTAINERS new file mode 100644 index 0000000000..2d7d7e10c5 --- /dev/null +++ b/board/freescale/p1_twr/MAINTAINERS @@ -0,0 +1,6 @@ +P1_TWR BOARD +M: - +S: Maintained +F: board/freescale/p1_twr/ +F: include/configs/p1_twr.h +F: configs/TWR-P1025_defconfig diff --git a/board/freescale/p1_twr/p1_twr.c b/board/freescale/p1_twr/p1_twr.c index 0e0d0587d7..a0a416ba17 100644 --- a/board/freescale/p1_twr/p1_twr.c +++ b/board/freescale/p1_twr/p1_twr.c @@ -155,7 +155,7 @@ void pci_init_board(void) int board_early_init_r(void) { const unsigned int flashbase = CONFIG_SYS_FLASH_BASE; - const u8 flash_esel = find_tlb_idx((void *)flashbase, 1); + int flash_esel = find_tlb_idx((void *)flashbase, 1); /* * Remap Boot flash region to caching-inhibited @@ -166,8 +166,14 @@ int board_early_init_r(void) flush_dcache(); invalidate_icache(); - /* invalidate existing TLB entry for flash */ - disable_tlb(flash_esel); + if (flash_esel == -1) { + /* very unlikely unless something is messed up */ + puts("Error: Could not find TLB for FLASH BASE\n"); + flash_esel = 2; /* give our best effort to continue */ + } else { + /* invalidate existing TLB entry for flash */ + disable_tlb(flash_esel); + } set_tlb(1, flashbase, CONFIG_SYS_FLASH_BASE_PHYS, /* tlb, epn, rpn */ MAS3_SW|MAS3_SR, MAS2_I|MAS2_G, /* perms, wimge */ |