diff options
| author | Kumar Gala <galak@kernel.crashing.org> | 2009-07-22 10:12:39 -0500 |
|---|---|---|
| committer | Kumar Gala <galak@kernel.crashing.org> | 2009-07-22 10:16:55 -0500 |
| commit | 048e7efe91f66094f868281c12e488ce2bae8976 (patch) | |
| tree | 730a52155fd4d11069608a45399bf20e7fc796ba /board/freescale/p2020ds/p2020ds.c | |
| parent | 0a6d0c6320b77bd6572393a93e6b8ccdf39c7100 (diff) | |
85xx/86xx: Replace in8/out8 with in_8/out_8 on FSL boards
The pixis code used in8/out8 all over the place. Replace it with
in_8/out_8 macros.
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Diffstat (limited to 'board/freescale/p2020ds/p2020ds.c')
| -rw-r--r-- | board/freescale/p2020ds/p2020ds.c | 22 |
1 files changed, 14 insertions, 8 deletions
diff --git a/board/freescale/p2020ds/p2020ds.c b/board/freescale/p2020ds/p2020ds.c index fdd8325544..14de7e740c 100644 --- a/board/freescale/p2020ds/p2020ds.c +++ b/board/freescale/p2020ds/p2020ds.c @@ -479,10 +479,12 @@ unsigned long calculate_board_sys_clk(ulong dummy) { ulong val; + u8 *pixis_base = (u8 *)PIXIS_BASE; + val = ics307_clk_freq( - in8(PIXIS_BASE + PIXIS_VSYSCLK0), - in8(PIXIS_BASE + PIXIS_VSYSCLK1), - in8(PIXIS_BASE + PIXIS_VSYSCLK2)); + in_8(pixis_base + PIXIS_VSYSCLK0), + in_8(pixis_base + PIXIS_VSYSCLK1), + in_8(pixis_base + PIXIS_VSYSCLK2)); debug("sysclk val = %lu\n", val); return val; } @@ -491,10 +493,12 @@ unsigned long calculate_board_ddr_clk(ulong dummy) { ulong val; + u8 *pixis_base = (u8 *)PIXIS_BASE; + val = ics307_clk_freq( - in8(PIXIS_BASE + PIXIS_VDDRCLK0), - in8(PIXIS_BASE + PIXIS_VDDRCLK1), - in8(PIXIS_BASE + PIXIS_VDDRCLK2)); + in_8(pixis_base + PIXIS_VDDRCLK0), + in_8(pixis_base + PIXIS_VDDRCLK1), + in_8(pixis_base + PIXIS_VDDRCLK2)); debug("ddrclk val = %lu\n", val); return val; } @@ -503,8 +507,9 @@ unsigned long get_board_sys_clk(ulong dummy) { u8 i; ulong val = 0; + u8 *pixis_base = (u8 *)PIXIS_BASE; - i = in8(PIXIS_BASE + PIXIS_SPD); + i = in_8(pixis_base + PIXIS_SPD); i &= 0x07; switch (i) { @@ -541,8 +546,9 @@ unsigned long get_board_ddr_clk(ulong dummy) { u8 i; ulong val = 0; + u8 *pixis_base = (u8 *)PIXIS_BASE; - i = in8(PIXIS_BASE + PIXIS_SPD); + i = in_8(pixis_base + PIXIS_SPD); i &= 0x38; i >>= 3; |