diff options
| author | Kumar Gala <galak@kernel.crashing.org> | 2009-09-02 09:03:08 -0500 |
|---|---|---|
| committer | Tom Rix <Tom.Rix@windriver.com> | 2009-10-03 09:04:17 -0500 |
| commit | 865f24dc92d03928c09b7f20a3133823e53c1ac3 (patch) | |
| tree | 455bd68614d879f650e82fe44f445d903a85e38c /board/freescale/p2020ds | |
| parent | 8b8376e81ca725772fa7a3e1b58ca55a761cdf1d (diff) | |
ppc/8xxx: Refactor code to determine if PCI is enabled & agent/host
Refactor the code into a simple bitmask lookup table that determines if
a given PCI controller is enabled and if its in host/root-complex or
agent/end-point mode.
Each processor in the PQ3/MPC86xx family specified different encodings
for the cfg_host_agt[] and cfg_IO_ports[] boot strapping signals.
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Diffstat (limited to 'board/freescale/p2020ds')
| -rw-r--r-- | board/freescale/p2020ds/p2020ds.c | 14 |
1 files changed, 6 insertions, 8 deletions
diff --git a/board/freescale/p2020ds/p2020ds.c b/board/freescale/p2020ds/p2020ds.c index 3fe72cd32c..7ad9be88c3 100644 --- a/board/freescale/p2020ds/p2020ds.c +++ b/board/freescale/p2020ds/p2020ds.c @@ -219,9 +219,8 @@ void pci_init_board(void) #ifdef CONFIG_PCIE2 pci = (ccsr_fsl_pci_t *) CONFIG_SYS_PCIE2_ADDR; hose = &pcie2_hose; - pcie_ep = (host_agent == 2) || (host_agent == 4) || - (host_agent == 6) || (host_agent == 0); - pcie_configured = (io_sel == 0x2) || (io_sel == 0xe); + pcie_ep = is_fsl_pci_agent(LAW_TRGT_IF_PCIE_2, host_agent); + pcie_configured = is_fsl_pci_cfg(LAW_TRGT_IF_PCIE_2, io_sel); r = hose->regions; if (pcie_configured && !(devdisr & MPC85xx_DEVDISR_PCIE2)) { @@ -287,9 +286,8 @@ void pci_init_board(void) #ifdef CONFIG_PCIE3 pci = (ccsr_fsl_pci_t *) CONFIG_SYS_PCIE3_ADDR; hose = &pcie3_hose; - pcie_ep = (host_agent == 0) || (host_agent == 3) || - (host_agent == 5) || (host_agent == 6); - pcie_configured = (io_sel == 0x2) || (io_sel == 0x4); + pcie_ep = is_fsl_pci_agent(LAW_TRGT_IF_PCIE_3, host_agent); + pcie_configured = is_fsl_pci_cfg(LAW_TRGT_IF_PCIE_3, io_sel); r = hose->regions; if (pcie_configured && !(devdisr & MPC85xx_DEVDISR_PCIE3)) { @@ -336,8 +334,8 @@ void pci_init_board(void) #ifdef CONFIG_PCIE1 pci = (ccsr_fsl_pci_t *) CONFIG_SYS_PCIE1_ADDR; hose = &pcie1_hose; - pcie_ep = (host_agent <= 1) || (host_agent == 4) || (host_agent == 5); - pcie_configured = (io_sel & 6) || (io_sel == 0xE) || (io_sel == 0xF); + pcie_ep = is_fsl_pci_agent(LAW_TRGT_IF_PCIE_1, host_agent); + pcie_configured = is_fsl_pci_cfg(LAW_TRGT_IF_PCIE_1, io_sel); r = hose->regions; if (pcie_configured && !(devdisr & MPC85xx_DEVDISR_PCIE)) { |