diff options
author | Albert ARIBAUD <albert.u.boot@aribaud.net> | 2013-05-30 14:45:06 +0200 |
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committer | Albert ARIBAUD <albert.u.boot@aribaud.net> | 2013-05-30 14:45:06 +0200 |
commit | a19b0dd62d7b8efc658fa1aa685ff5665878f3ee (patch) | |
tree | 1fadf0fb3da83203ba28f209ec99e1b33e03f4d5 /board/freescale/p2041rdb | |
parent | 60985bba58e7695dac1fddae8cdbb62d8cfd1254 (diff) | |
parent | a71d45d706a5b51c348160163b6c159632273fed (diff) |
Merge branch 'u-boot/master' into 'u-boot-arm/master'
Conflicts:
common/cmd_fpga.c
drivers/usb/host/ohci-at91.c
Diffstat (limited to 'board/freescale/p2041rdb')
-rw-r--r-- | board/freescale/p2041rdb/p2041rdb.c | 11 |
1 files changed, 11 insertions, 0 deletions
diff --git a/board/freescale/p2041rdb/p2041rdb.c b/board/freescale/p2041rdb/p2041rdb.c index a706a6d00c..44d3e0c618 100644 --- a/board/freescale/p2041rdb/p2041rdb.c +++ b/board/freescale/p2041rdb/p2041rdb.c @@ -227,6 +227,17 @@ int misc_init_r(void) "'00' is unsupported\n"); else actual[i] = freq[i][clock]; + + /* + * PC board uses a different CPLD with PB board, this CPLD + * has cpld_ver_sub = 1, and pcba_ver = 5. But CPLD on PB + * board has cpld_ver_sub = 0, and pcba_ver = 4. + */ + if ((i == 1) && (CPLD_READ(cpld_ver_sub) == 1) && + (CPLD_READ(pcba_ver) == 5)) { + /* PC board bank2 frequency */ + actual[i] = freq[i-1][clock]; + } } for (i = 0; i < NUM_SRDS_BANKS; i++) { |