diff options
author | Prabhakar Kushwaha <prabhakar@freescale.com> | 2014-04-08 19:13:56 +0530 |
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committer | York Sun <yorksun@freescale.com> | 2014-04-22 17:58:51 -0700 |
commit | 18c0144542a73a735ab55f0f51e4a5a255e92c1a (patch) | |
tree | 3d956b5adba0a2e8ff3fe06339373e9200b03c5a /board/freescale/t104xrdb/t104x_pbi.cfg | |
parent | c5dfe6ec58e0b504cba5b429200f6a5d217d5bd9 (diff) |
board/t104xrdb: Add support of NAND, SD, SPI boot for T104xRDB
Add support of 2 stage NAND, SD, SPI boot loader using SPL framework.
here, PBL initialise the internal SRAM and copy SPL(160KB). This further
initialise DDR using SPD and environment and copy u-boot(768 KB) from NAND to DDR.
Finally SPL transer control to u-boot.
Initialise/create followings required for SPL framework
- Add spl.c which defines board_init_f, board_init_r
- update tlb and ddr accordingly
Signed-off-by: Prabhakar Kushwaha <prabhakar@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>
Diffstat (limited to 'board/freescale/t104xrdb/t104x_pbi.cfg')
-rw-r--r-- | board/freescale/t104xrdb/t104x_pbi.cfg | 26 |
1 files changed, 26 insertions, 0 deletions
diff --git a/board/freescale/t104xrdb/t104x_pbi.cfg b/board/freescale/t104xrdb/t104x_pbi.cfg new file mode 100644 index 0000000000..7b9e9b05f7 --- /dev/null +++ b/board/freescale/t104xrdb/t104x_pbi.cfg @@ -0,0 +1,26 @@ +#PBI commands +#Initialize CPC1 +09010000 00200400 +09138000 00000000 +091380c0 00000100 +#Configure CPC1 as 256KB SRAM +09010100 00000000 +09010104 fffc0007 +09010f00 08000000 +09010000 80000000 +#Configure LAW for CPC1 +09000cd0 00000000 +09000cd4 fffc0000 +09000cd8 81000011 +#Configure alternate space +09000010 00000000 +09000014 ff000000 +09000018 81000000 +#Configure SPI controller +09110000 80000403 +09110020 2d170008 +09110024 00100008 +09110028 00100008 +0911002c 00100008 +#Flush PBL data +091380c0 000FFFFF |