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authorTom Rini <trini@konsulko.com>2017-01-19 12:22:23 -0500
committerTom Rini <trini@konsulko.com>2017-01-19 12:22:23 -0500
commit0675f992dbf4a785a05a1baf149c2bce6aa5fe90 (patch)
treeb8868ec70ff6b2b20f8f0fb87df9438906020a08 /board/freescale
parent755b06d1c0f3b16318c7580bec066efbb9ec6ccf (diff)
parent5e4a6db8f428cb1f8ced74bc77241144ac0c5b1a (diff)
Merge git://git.denx.de/u-boot-fsl-qoriq
Diffstat (limited to 'board/freescale')
-rw-r--r--board/freescale/common/Makefile1
-rw-r--r--board/freescale/common/mc34vr500.c95
-rw-r--r--board/freescale/ls1012aqds/ls1012aqds.c28
-rw-r--r--board/freescale/ls1012ardb/ls1012ardb.c38
-rw-r--r--board/freescale/ls1046ardb/cpld.c9
-rw-r--r--board/freescale/ls1046ardb/cpld.h1
-rw-r--r--board/freescale/ls1046ardb/ls1046ardb.c34
7 files changed, 206 insertions, 0 deletions
diff --git a/board/freescale/common/Makefile b/board/freescale/common/Makefile
index e9419492bc..1c53fb605b 100644
--- a/board/freescale/common/Makefile
+++ b/board/freescale/common/Makefile
@@ -61,6 +61,7 @@ obj-$(CONFIG_VSC_CROSSBAR) += vsc3316_3308.o
obj-$(CONFIG_IDT8T49N222A) += idt8t49n222a_serdes_clk.o
obj-$(CONFIG_ZM7300) += zm7300.o
obj-$(CONFIG_POWER_PFUZE100) += pfuze.o
+obj-$(CONFIG_POWER_MC34VR500) += mc34vr500.o
obj-$(CONFIG_LS102XA_STREAM_ID) += ls102xa_stream_id.o
diff --git a/board/freescale/common/mc34vr500.c b/board/freescale/common/mc34vr500.c
new file mode 100644
index 0000000000..9c57569366
--- /dev/null
+++ b/board/freescale/common/mc34vr500.c
@@ -0,0 +1,95 @@
+/*
+ * Copyright 2016 Freescale Semiconductor, Inc.
+ * Hou Zhiqiang <Zhiqiang.Hou@freescale.com>
+ *
+ * SPDX-License-Identifier: GPL-2.0+
+ */
+
+#include <common.h>
+#include <errno.h>
+#include <i2c.h>
+#include <power/pmic.h>
+#include <power/mc34vr500_pmic.h>
+
+static uint8_t swxvolt_addr[4] = { MC34VR500_SW1VOLT,
+ MC34VR500_SW2VOLT,
+ MC34VR500_SW3VOLT,
+ MC34VR500_SW4VOLT };
+
+static uint8_t swx_set_point_base[4] = { 13, 9, 9, 9 };
+
+int mc34vr500_get_sw_volt(uint8_t sw)
+{
+ struct pmic *p;
+ u32 swxvolt;
+ uint8_t spb;
+ int sw_volt;
+ int ret;
+
+ debug("%s: Get SW%u volt from swxvolt_addr = 0x%x\n",
+ __func__, sw + 1, swxvolt_addr[sw]);
+ if (sw > SW4) {
+ printf("%s: Unsupported SW(sw%d)\n", __func__, sw + 1);
+ return -EINVAL;
+ }
+
+ p = pmic_get("MC34VR500");
+ if (!p) {
+ printf("%s: Did NOT find PMIC MC34VR500\n", __func__);
+ return -ENODEV;
+ }
+
+ ret = pmic_probe(p);
+ if (ret)
+ return ret;
+
+ ret = pmic_reg_read(p, swxvolt_addr[sw], &swxvolt);
+ if (ret) {
+ printf("%s: Failed to get SW%u volt\n", __func__, sw + 1);
+ return ret;
+ }
+
+ debug("%s: SW%d step point swxvolt = %u\n", __func__, sw + 1, swxvolt);
+ spb = swx_set_point_base[sw];
+ /* The base of SW volt is 625mV and increase by step 25mV */
+ sw_volt = 625 + (swxvolt - spb) * 25;
+
+ debug("%s: SW%u volt = %dmV\n", __func__, sw + 1, sw_volt);
+ return sw_volt;
+}
+
+int mc34vr500_set_sw_volt(uint8_t sw, int sw_volt)
+{
+ struct pmic *p;
+ u32 swxvolt;
+ uint8_t spb;
+ int ret;
+
+ debug("%s: Set SW%u volt to %dmV\n", __func__, sw + 1, sw_volt);
+ /* The least SW volt is 625mV, and only 4 SW outputs */
+ if (sw > SW4 || sw_volt < 625)
+ return -EINVAL;
+
+ p = pmic_get("MC34VR500");
+ if (!p) {
+ printf("%s: Did NOT find PMIC MC34VR500\n", __func__);
+ return -ENODEV;
+ }
+
+ ret = pmic_probe(p);
+ if (ret)
+ return ret;
+
+ spb = swx_set_point_base[sw];
+ /* The base of SW volt is 625mV and increase by step 25mV */
+ swxvolt = (sw_volt - 625) / 25 + spb;
+ debug("%s: SW%d step point swxvolt = %u\n", __func__, sw + 1, swxvolt);
+ if (swxvolt > 63)
+ return -EINVAL;
+
+ ret = pmic_reg_write(p, swxvolt_addr[sw], swxvolt);
+ if (ret)
+ return ret;
+
+ return 0;
+}
diff --git a/board/freescale/ls1012aqds/ls1012aqds.c b/board/freescale/ls1012aqds/ls1012aqds.c
index 94440b3c80..88fb4ce99b 100644
--- a/board/freescale/ls1012aqds/ls1012aqds.c
+++ b/board/freescale/ls1012aqds/ls1012aqds.c
@@ -121,6 +121,34 @@ int board_eth_init(bd_t *bis)
return pci_eth_init(bis);
}
+int esdhc_status_fixup(void *blob, const char *compat)
+{
+ char esdhc0_path[] = "/soc/esdhc@1560000";
+ char esdhc1_path[] = "/soc/esdhc@1580000";
+ u8 card_id;
+
+ do_fixup_by_path(blob, esdhc0_path, "status", "okay",
+ sizeof("okay"), 1);
+
+ /*
+ * The Presence Detect 2 register detects the installation
+ * of cards in various PCI Express or SGMII slots.
+ *
+ * STAT_PRS2[7:5]: Specifies the type of card installed in the
+ * SDHC2 Adapter slot. 0b111 indicates no adapter is installed.
+ */
+ card_id = (QIXIS_READ(present2) & 0xe0) >> 5;
+
+ /* If no adapter is installed in SDHC2, disable SDHC2 */
+ if (card_id == 0x7)
+ do_fixup_by_path(blob, esdhc1_path, "status", "disabled",
+ sizeof("disabled"), 1);
+ else
+ do_fixup_by_path(blob, esdhc1_path, "status", "okay",
+ sizeof("okay"), 1);
+ return 0;
+}
+
#ifdef CONFIG_OF_BOARD_SETUP
int ft_board_setup(void *blob, bd_t *bd)
{
diff --git a/board/freescale/ls1012ardb/ls1012ardb.c b/board/freescale/ls1012ardb/ls1012ardb.c
index 778434d684..65fa94c618 100644
--- a/board/freescale/ls1012ardb/ls1012ardb.c
+++ b/board/freescale/ls1012ardb/ls1012ardb.c
@@ -113,6 +113,44 @@ int board_init(void)
return 0;
}
+int esdhc_status_fixup(void *blob, const char *compat)
+{
+ char esdhc0_path[] = "/soc/esdhc@1560000";
+ char esdhc1_path[] = "/soc/esdhc@1580000";
+ u8 io = 0;
+ u8 mux_sdhc2;
+
+ do_fixup_by_path(blob, esdhc0_path, "status", "okay",
+ sizeof("okay"), 1);
+
+ i2c_set_bus_num(0);
+
+ /*
+ * The I2C IO-expander for mux select is used to control the muxing
+ * of various onboard interfaces.
+ *
+ * IO1[3:2] indicates SDHC2 interface demultiplexer select lines.
+ * 00 - SDIO wifi
+ * 01 - GPIO (to Arduino)
+ * 10 - eMMC Memory
+ * 11 - SPI
+ */
+ if (i2c_read(I2C_MUX_IO1_ADDR, 0, 1, &io, 1) < 0) {
+ printf("Error reading i2c boot information!\n");
+ return 0; /* Don't want to hang() on this error */
+ }
+
+ mux_sdhc2 = (io & 0x0c) >> 2;
+ /* Enable SDHC2 only when use SDIO wifi and eMMC */
+ if (mux_sdhc2 == 2 || mux_sdhc2 == 0)
+ do_fixup_by_path(blob, esdhc1_path, "status", "okay",
+ sizeof("okay"), 1);
+ else
+ do_fixup_by_path(blob, esdhc1_path, "status", "disabled",
+ sizeof("disabled"), 1);
+ return 0;
+}
+
int ft_board_setup(void *blob, bd_t *bd)
{
arch_fixup_fdt(blob);
diff --git a/board/freescale/ls1046ardb/cpld.c b/board/freescale/ls1046ardb/cpld.c
index 81a646e28c..c0500f474f 100644
--- a/board/freescale/ls1046ardb/cpld.c
+++ b/board/freescale/ls1046ardb/cpld.c
@@ -82,6 +82,15 @@ void cpld_set_sd(void)
CPLD_WRITE(system_rst, 1);
}
+
+void cpld_select_core_volt(bool en_0v9)
+{
+ u8 reg17 = en_0v9;
+
+ CPLD_WRITE(vdd_en, 1);
+ CPLD_WRITE(vdd_sel, reg17);
+}
+
#ifdef DEBUG
static void cpld_dump_regs(void)
{
diff --git a/board/freescale/ls1046ardb/cpld.h b/board/freescale/ls1046ardb/cpld.h
index 458da7e892..f6a1a61e61 100644
--- a/board/freescale/ls1046ardb/cpld.h
+++ b/board/freescale/ls1046ardb/cpld.h
@@ -35,6 +35,7 @@ struct cpld_data {
u8 cpld_read(unsigned int reg);
void cpld_write(unsigned int reg, u8 value);
void cpld_rev_bit(unsigned char *value);
+void cpld_select_core_volt(bool en_0v9);
#define CPLD_READ(reg) cpld_read(offsetof(struct cpld_data, reg))
#define CPLD_WRITE(reg, value) \
diff --git a/board/freescale/ls1046ardb/ls1046ardb.c b/board/freescale/ls1046ardb/ls1046ardb.c
index 585c807818..33a58cf440 100644
--- a/board/freescale/ls1046ardb/ls1046ardb.c
+++ b/board/freescale/ls1046ardb/ls1046ardb.c
@@ -19,6 +19,7 @@
#include <fm_eth.h>
#include <fsl_csu.h>
#include <fsl_esdhc.h>
+#include <power/mc34vr500_pmic.h>
#include "cpld.h"
DECLARE_GLOBAL_DATA_PTR;
@@ -87,6 +88,39 @@ int board_init(void)
return 0;
}
+int board_setup_core_volt(u32 vdd)
+{
+ bool en_0v9;
+
+ en_0v9 = (vdd == 900) ? true : false;
+ cpld_select_core_volt(en_0v9);
+
+ return 0;
+}
+
+int get_serdes_volt(void)
+{
+ return mc34vr500_get_sw_volt(SW4);
+}
+
+int set_serdes_volt(int svdd)
+{
+ return mc34vr500_set_sw_volt(SW4, svdd);
+}
+
+int power_init_board(void)
+{
+ int ret;
+
+ ret = power_mc34vr500_init(0);
+ if (ret)
+ return ret;
+
+ setup_chip_volt();
+
+ return 0;
+}
+
void config_board_mux(void)
{
#ifdef CONFIG_HAS_FSL_XHCI_USB