diff options
| author | Stefan Roese <sr@denx.de> | 2008-07-14 10:45:47 +0200 |
|---|---|---|
| committer | Stefan Roese <sr@denx.de> | 2008-07-14 10:45:47 +0200 |
| commit | 4b326101d6cfaeab8250988bc4c7f51e6c92d719 (patch) | |
| tree | d04632af08591263f5cd6fc8a5c6ba8ac3d6d246 /board/freescale | |
| parent | 69e2c6d0d13d7c8cf1612ac090bdc4c59ba6858e (diff) | |
| parent | d5996dd555edf52721b7691a4c59de016251ed39 (diff) | |
Merge branch 'master' of /home/stefan/git/u-boot/u-boot into next
Diffstat (limited to 'board/freescale')
| -rw-r--r-- | board/freescale/m5235evb/m5235evb.c | 3 | ||||
| -rw-r--r-- | board/freescale/m5275evb/Makefile | 2 | ||||
| -rw-r--r-- | board/freescale/mpc7448hpc2/tsi108_init.c | 8 |
3 files changed, 8 insertions, 5 deletions
diff --git a/board/freescale/m5235evb/m5235evb.c b/board/freescale/m5235evb/m5235evb.c index c2c8fe8590..bd8a4e5e68 100644 --- a/board/freescale/m5235evb/m5235evb.c +++ b/board/freescale/m5235evb/m5235evb.c @@ -75,9 +75,11 @@ phys_size_t initdram(int board_type) sdram->dacr0 = SDRAMC_DARCn_BA(CFG_SDRAM_BASE) | SDRAMC_DARCn_CASL_C1 | SDRAMC_DARCn_CBM_CMD20 | SDRAMC_DARCn_PS_32; + asm("nop"); /* Initialize DMR0 */ sdram->dmr0 = ((dramsize - 1) & 0xFFFC0000) | SDRAMC_DMRn_V; + asm("nop"); /* Set IP (bit 3) in DACR */ sdram->dacr0 |= SDRAMC_DARCn_IP; @@ -100,6 +102,7 @@ phys_size_t initdram(int board_type) /* Finish the configuration by issuing the MRS. */ sdram->dacr0 |= SDRAMC_DARCn_IMRS; + asm("nop"); /* Write to the SDRAM Mode Register */ *(u32 *) (CFG_SDRAM_BASE + 0x400) = 0xA5A59696; diff --git a/board/freescale/m5275evb/Makefile b/board/freescale/m5275evb/Makefile index ef0b19ed2c..f337a7563c 100644 --- a/board/freescale/m5275evb/Makefile +++ b/board/freescale/m5275evb/Makefile @@ -31,7 +31,7 @@ SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c) OBJS := $(addprefix $(obj),$(COBJS)) SOBJS := $(addprefix $(obj),$(SOBJS)) -$(LIB): .depend $(OBJS) +$(LIB): $(obj).depend $(OBJS) $(AR) $(ARFLAGS) $@ $(OBJS) ######################################################################### diff --git a/board/freescale/mpc7448hpc2/tsi108_init.c b/board/freescale/mpc7448hpc2/tsi108_init.c index efa952c2e7..ad80694077 100644 --- a/board/freescale/mpc7448hpc2/tsi108_init.c +++ b/board/freescale/mpc7448hpc2/tsi108_init.c @@ -165,8 +165,8 @@ int board_early_init_f (void) printf ("Invalid DDR2 clock setting\n"); return -1; } - printf ("BUS: %d MHz\n", get_board_bus_clk() / 1000000); - printf ("MEM: %d MHz\n", gd->mem_clk / 1000000); + printf ("BUS: %lu MHz\n", get_board_bus_clk() / 1000000); + printf ("MEM: %lu MHz\n", gd->mem_clk / 1000000); return 0; } @@ -622,8 +622,8 @@ int misc_init_r (void) #ifdef CFG_L2 l2cache_enable (); #endif - printf ("BUS: %d MHz\n", gd->bus_clk / 1000000); - printf ("MEM: %d MHz\n", gd->mem_clk / 1000000); + printf ("BUS: %lu MHz\n", gd->bus_clk / 1000000); + printf ("MEM: %lu MHz\n", gd->mem_clk / 1000000); /* * All the information needed to print the cache details is avaiblable |