diff options
author | Benoît Thébaudeau <benoit.thebaudeau@advansee.com> | 2012-08-14 08:43:07 +0000 |
---|---|---|
committer | Tom Rini <trini@ti.com> | 2012-10-15 11:54:14 -0700 |
commit | 9e0081d573442e7234355f0a043218d15df03933 (patch) | |
tree | bc508d9fa9b248d70cac2ed736d834d22f5e0e3b /board/freescale | |
parent | b809b3ac13e1016b2be937bd4511973f90982ad2 (diff) |
mx31: Fix PDR0_CSI_PODF
The CSI PODF bit-field used by the previous code for the i.MX31 CCM PDR0
register is actually composed of two bit-fields: one pre-divider and one
post-divider. This patch fixes the CCM access macros and the code using them
accordingly.
Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com>
Cc: Stefano Babic <sbabic@denx.de>
Diffstat (limited to 'board/freescale')
-rw-r--r-- | board/freescale/mx31ads/lowlevel_init.S | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/board/freescale/mx31ads/lowlevel_init.S b/board/freescale/mx31ads/lowlevel_init.S index 5c18bc1964..2972065822 100644 --- a/board/freescale/mx31ads/lowlevel_init.S +++ b/board/freescale/mx31ads/lowlevel_init.S @@ -246,8 +246,8 @@ lowlevel_init: /* COSR */ str r1, [r0, #0x1c] - /* RedBoot sets 0x1ff, 7, 3, 5, 1, 3, 0 */ -/* REG CCM_PDR0, PDR0_CSI_PODF(0x1ff) | PDR0_PER_PODF(7) | PDR0_HSP_PODF(2) | PDR0_NFC_PODF(6) | PDR0_IPG_PODF(1) | PDR0_MAX_PODF(2) | PDR0_MCU_PODF(0)*/ + /* RedBoot sets 0x3f, 7, 7, 3, 5, 1, 3, 0 */ +/* REG CCM_PDR0, PDR0_CSI_PODF(0x3f) | PDR0_CSI_PRDF(7) | PDR0_PER_PODF(7) | PDR0_HSP_PODF(2) | PDR0_NFC_PODF(6) | PDR0_IPG_PODF(1) | PDR0_MAX_PODF(2) | PDR0_MCU_PODF(0)*/ /* Redboot: 0, 51, 10, 12 / 0, 14, 9, 13 */ /* REG CCM_MPCTL, PLL_PD(0) | PLL_MFD(0x33) | PLL_MFI(7) | PLL_MFN(0x23)*/ |