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authorYangbo Lu <yangbo.lu@nxp.com>2020-06-17 18:08:59 +0800
committerPriyanka Jain <priyanka.jain@nxp.com>2020-07-27 14:16:28 +0530
commite1a31034a6052572eccceb6c69142732fd441ac0 (patch)
treecd90f076d926be60b5dbe52cd57140a66916126d /board/freescale
parent39913acedd673c815af06da8dc3ef04c6e674d4a (diff)
board: fsl: lx2160aqds: identify SDHC adapter during board init
Add support for SDHC adapter identification and configuration during board init. Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com> Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
Diffstat (limited to 'board/freescale')
-rw-r--r--board/freescale/common/qixis.h11
-rw-r--r--board/freescale/lx2160a/lx2160a.c36
2 files changed, 44 insertions, 3 deletions
diff --git a/board/freescale/common/qixis.h b/board/freescale/common/qixis.h
index ac5abc36f9..93638d2452 100644
--- a/board/freescale/common/qixis.h
+++ b/board/freescale/common/qixis.h
@@ -36,7 +36,12 @@ struct qixis {
u8 gdc;
u8 gdd; /* DCM Debug Data Register,0x17 */
u8 dmack;
- u8 res1[6];
+ u8 res1;
+ u8 sdhc1;
+ u8 sdhc2;
+ u8 stat_pres3;
+ u8 los_stat;
+ u8 usb_ctl;
u8 watch; /* Watchdog Register,0x1F */
u8 pwr_ctl[2]; /* Power Control Register,0x20 */
u8 res2[2];
@@ -117,6 +122,7 @@ void qixis_write_i2c(unsigned int reg, u8 value);
/* Use for SDHC adapter card type identification and operation */
#define QIXIS_SDID_MASK 0x07
+
#define QIXIS_ESDHC_ADAPTER_TYPE_EMMC45 0x1 /* eMMC Card Rev4.5 */
#define QIXIS_ESDHC_ADAPTER_TYPE_SDMMC_LEGACY 0x2 /* SD/MMC Legacy Card */
#define QIXIS_ESDHC_ADAPTER_TYPE_EMMC44 0x3 /* eMMC Card Rev4.4 */
@@ -125,6 +131,9 @@ void qixis_write_i2c(unsigned int reg, u8 value);
#define QIXIS_ESDHC_ADAPTER_TYPE_SD 0x6 /* SD Card Rev2.0 3.0 */
#define QIXIS_ESDHC_NO_ADAPTER 0x7 /* No Card is Present*/
+#define QIXIS_SDHC1_S1V3 0x80 /* SDHC1: SDHC1 3.3V power control */
+#define QIXIS_SDHC1_VS 0x30 /* BRDCFG11: route to SDHC1_VS */
+
#define QIXIS_SDCLKIN 0x08
#define QIXIS_SDCLKOUT 0x02
#define QIXIS_DAT5_6_7 0X02
diff --git a/board/freescale/lx2160a/lx2160a.c b/board/freescale/lx2160a/lx2160a.c
index 8ec4df1ac9..ace2a1927d 100644
--- a/board/freescale/lx2160a/lx2160a.c
+++ b/board/freescale/lx2160a/lx2160a.c
@@ -18,6 +18,7 @@
#include <fdt_support.h>
#include <linux/bitops.h>
#include <linux/libfdt.h>
+#include <linux/delay.h>
#include <fsl-mc/fsl_mc.h>
#include <env_internal.h>
#include <efi_loader.h>
@@ -379,7 +380,7 @@ int checkboard(void)
*/
u8 qixis_esdhc_detect_quirk(void)
{
- /* for LX2160AQDS res1[1] @ offset 0x1A is SDHC1 Control/Status (SDHC1)
+ /*
* SDHC1 Card ID:
* Specifies the type of card installed in the SDHC1 adapter slot.
* 000= (reserved)
@@ -391,10 +392,35 @@ u8 qixis_esdhc_detect_quirk(void)
* 110= SDCard V2/V3 adapter installed.
* 111= no adapter is installed.
*/
- return ((QIXIS_READ(res1[1]) & QIXIS_SDID_MASK) !=
+ return ((QIXIS_READ(sdhc1) & QIXIS_SDID_MASK) !=
QIXIS_ESDHC_NO_ADAPTER);
}
+static void esdhc_adapter_card_ident(void)
+{
+ u8 card_id, val;
+
+ val = QIXIS_READ(sdhc1);
+ card_id = val & QIXIS_SDID_MASK;
+
+ switch (card_id) {
+ case QIXIS_ESDHC_ADAPTER_TYPE_SD:
+ /* Power cycle to card */
+ val &= ~QIXIS_SDHC1_S1V3;
+ QIXIS_WRITE(sdhc1, val);
+ mdelay(1);
+ val |= QIXIS_SDHC1_S1V3;
+ QIXIS_WRITE(sdhc1, val);
+ /* Route to SDHC1_VS */
+ val = QIXIS_READ(brdcfg[11]);
+ val |= QIXIS_SDHC1_VS;
+ QIXIS_WRITE(brdcfg[11], val);
+ break;
+ default:
+ break;
+ }
+}
+
int config_board_mux(void)
{
u8 reg11, reg5, reg13;
@@ -501,6 +527,12 @@ int config_board_mux(void)
return 0;
}
+
+int board_early_init_r(void)
+{
+ esdhc_adapter_card_ident();
+ return 0;
+}
#elif defined(CONFIG_TARGET_LX2160ARDB)
int config_board_mux(void)
{