imx: ventana: split out common functions between SPL and uboot

Move shared functions used by both SPL and U-Boot to common.c:
 - setup_iomux_uart() and uart pad config
 - gpio pad config

In the process also moved the following to common.c in preparation for
calling it from the SPL:
 - split i2c setup into a shared function
 - move pmic init to setup_pmic() function to call directly from
   power_init_board()
 - split gpio setup into early (iomux and default pin config)
   and late (output configuration based on env)

Signed-off-by: Tim Harvey <tharvey@gateworks.com>

1 files changed, 98 insertions, 0 deletions

diff --git a/board/gateworks/gw_ventana/common.h b/board/gateworks/gw_ventana/common.h
new file mode 100644
index 0000000000..a303b5511f
--- /dev/null
+++ b/board/gateworks/gw_ventana/common.h
@@ -0,0 +1,98 @@
+/*
+ * Copyright (C) 2013 Gateworks Corporation
+ *
+ * Author: Tim Harvey <tharvey@gateworks.com>
+ *
+ * SPDX-License-Identifier: GPL-2.0+
+ */
+
+#ifndef _GWVENTANA_COMMON_H_
+#define _GWVENTANA_COMMON_H_
+
+#include "ventana_eeprom.h"
+
+/* GPIO's common to all baseboards */
+#define GP_PHY_RST	IMX_GPIO_NR(1, 30)
+#define GP_USB_OTG_PWR	IMX_GPIO_NR(3, 22)
+#define GP_SD3_CD	IMX_GPIO_NR(7, 0)
+#define GP_RS232_EN	IMX_GPIO_NR(2, 11)
+#define GP_MSATA_SEL	IMX_GPIO_NR(2, 8)
+
+#define UART_PAD_CTRL  (PAD_CTL_PKE | PAD_CTL_PUE |		\
+	PAD_CTL_PUS_100K_UP | PAD_CTL_SPEED_MED |		\
+	PAD_CTL_DSE_40ohm   | PAD_CTL_SRE_FAST  | PAD_CTL_HYS)
+
+#define USDHC_PAD_CTRL (PAD_CTL_PKE | PAD_CTL_PUE |		\
+	PAD_CTL_PUS_47K_UP  | PAD_CTL_SPEED_LOW |		\
+	PAD_CTL_DSE_80ohm   | PAD_CTL_SRE_FAST  | PAD_CTL_HYS)
+
+#define ENET_PAD_CTRL  (PAD_CTL_PKE | PAD_CTL_PUE |		\
+	PAD_CTL_PUS_100K_UP | PAD_CTL_SPEED_MED	  |		\
+	PAD_CTL_DSE_40ohm   | PAD_CTL_HYS)
+
+#define SPI_PAD_CTRL (PAD_CTL_HYS |				\
+	PAD_CTL_PUS_100K_DOWN | PAD_CTL_SPEED_MED |		\
+	PAD_CTL_DSE_40ohm     | PAD_CTL_SRE_FAST)
+
+#define DIO_PAD_CTRL  (PAD_CTL_PKE | PAD_CTL_PUE |		\
+	PAD_CTL_PUS_100K_UP | PAD_CTL_SPEED_MED |		\
+	PAD_CTL_DSE_34ohm | PAD_CTL_HYS | PAD_CTL_SRE_FAST)
+
+#define I2C_PAD_CTRL  (PAD_CTL_PUS_100K_UP |			\
+	PAD_CTL_SPEED_MED | PAD_CTL_DSE_40ohm | PAD_CTL_HYS |	\
+	PAD_CTL_ODE | PAD_CTL_SRE_FAST)
+
+#define IRQ_PAD_CTRL  (PAD_CTL_PKE | PAD_CTL_PUE |		\
+	PAD_CTL_PUS_100K_UP | PAD_CTL_SPEED_MED |		\
+	PAD_CTL_DSE_34ohm | PAD_CTL_HYS | PAD_CTL_SRE_FAST)
+
+#define DIO_PAD_CFG   (MUX_PAD_CTRL(DIO_PAD_CTRL) | MUX_MODE_SION)
+
+#define PC MUX_PAD_CTRL(I2C_PAD_CTRL)
+
+/*
+ * each baseboard has 4 user configurable Digital IO lines which can
+ * be pinmuxed as a GPIO or in some cases a PWM
+ */
+struct dio_cfg {
+	iomux_v3_cfg_t gpio_padmux[2];
+	unsigned gpio_param;
+	iomux_v3_cfg_t pwm_padmux[2];
+	unsigned pwm_param;
+};
+
+struct ventana {
+	/* pinmux */
+	iomux_v3_cfg_t const *gpio_pads;
+	int num_pads;
+	/* DIO pinmux/val */
+	struct dio_cfg dio_cfg[4];
+	int num_gpios;
+	/* various gpios (0 if non-existent) */
+	int leds[3];
+	int pcie_rst;
+	int mezz_pwren;
+	int mezz_irq;
+	int rs485en;
+	int gps_shdn;
+	int vidin_en;
+	int dioi2c_en;
+	int pcie_sson;
+	int usb_sel;
+	int wdis;
+};
+
+extern struct ventana gpio_cfg[GW_UNKNOWN];
+
+/* configure i2c iomux */
+void setup_ventana_i2c(void);
+/* configure uart iomux */
+void setup_iomux_uart(void);
+/* conifgure PMIC */
+void setup_pmic(int board);
+/* configure gpio iomux/defaults */
+void setup_iomux_gpio(int board, struct ventana_board_info *);
+/* late setup of GPIO (configuration per baseboard and env) */
+void setup_board_gpio(int board, struct ventana_board_info *);
+
+#endif /* #ifndef _GWVENTANA_COMMON_H_ */