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authorDirk Eibach <eibach@gdsys.de>2013-06-26 16:04:26 +0200
committerStefan Roese <sr@denx.de>2013-07-25 19:35:42 +0200
commitaba27acf6711dce0ef1507f2f9f02a80d70a45da (patch)
treef77350104f847ab46c990c7119cb705f51089a09 /board/gdsys/405ep
parentaaf5e825606a70ddc8fca8e366d8c16a6fd3cc7c (diff)
powerpc/ppc4xx: Use generic accessor functions for gdsys FPGA
A set of accessor functions was added to be able to access not only memory mapped FPGA in a generic way. Thanks to Wolfgang Denk for getting this sorted properly. Signed-off-by: Dirk Eibach <dirk.eibach@gdsys.cc> Signed-off-by: Stefan Roese <sr@denx.de>
Diffstat (limited to 'board/gdsys/405ep')
-rw-r--r--board/gdsys/405ep/405ep.c22
-rw-r--r--board/gdsys/405ep/dlvision-10g.c18
-rw-r--r--board/gdsys/405ep/io.c16
-rw-r--r--board/gdsys/405ep/iocon.c24
-rw-r--r--board/gdsys/405ep/neo.c13
5 files changed, 59 insertions, 34 deletions
diff --git a/board/gdsys/405ep/405ep.c b/board/gdsys/405ep/405ep.c
index f0df2e39e6..426dc05c7d 100644
--- a/board/gdsys/405ep/405ep.c
+++ b/board/gdsys/405ep/405ep.c
@@ -18,6 +18,12 @@
#define REFLECTION_TESTPATTERN 0xdede
#define REFLECTION_TESTPATTERN_INV (~REFLECTION_TESTPATTERN & 0xffff)
+#ifdef CONFIG_SYS_FPGA_NO_RFL_HI
+#define REFLECTION_TESTREG reflection_low
+#else
+#define REFLECTION_TESTREG reflection_high
+#endif
+
DECLARE_GLOBAL_DATA_PTR;
int get_fpga_state(unsigned dev)
@@ -90,23 +96,17 @@ int board_early_init_r(void)
gd405ep_set_fpga_reset(0);
for (k = 0; k < CONFIG_SYS_FPGA_COUNT; ++k) {
- struct ihs_fpga *fpga =
- (struct ihs_fpga *)CONFIG_SYS_FPGA_BASE(k);
-#ifdef CONFIG_SYS_FPGA_NO_RFL_HI
- u16 *reflection_target = &fpga->reflection_low;
-#else
- u16 *reflection_target = &fpga->reflection_high;
-#endif
/*
* wait for fpga out of reset
*/
ctr = 0;
while (1) {
- out_le16(&fpga->reflection_low,
- REFLECTION_TESTPATTERN);
+ u16 val;
+
+ FPGA_SET_REG(k, reflection_low, REFLECTION_TESTPATTERN);
- if (in_le16(reflection_target) ==
- REFLECTION_TESTPATTERN_INV)
+ FPGA_GET_REG(k, REFLECTION_TESTREG, &val);
+ if (val == REFLECTION_TESTPATTERN_INV)
break;
udelay(100000);
diff --git a/board/gdsys/405ep/dlvision-10g.c b/board/gdsys/405ep/dlvision-10g.c
index 48d878643b..35dfbbc577 100644
--- a/board/gdsys/405ep/dlvision-10g.c
+++ b/board/gdsys/405ep/dlvision-10g.c
@@ -55,6 +55,8 @@ enum {
RAM_DDR2_64 = 2,
};
+struct ihs_fpga *fpga_ptr[] = CONFIG_SYS_FPGA_PTR;
+
int misc_init_r(void)
{
/* startup fans */
@@ -79,10 +81,9 @@ static unsigned int get_mc2_present(void)
static void print_fpga_info(unsigned dev)
{
- struct ihs_fpga *fpga = (struct ihs_fpga *) CONFIG_SYS_FPGA_BASE(dev);
- u16 versions = in_le16(&fpga->versions);
- u16 fpga_version = in_le16(&fpga->fpga_version);
- u16 fpga_features = in_le16(&fpga->fpga_features);
+ u16 versions;
+ u16 fpga_version;
+ u16 fpga_features;
unsigned unit_type;
unsigned hardware_version;
unsigned feature_rs232;
@@ -96,6 +97,10 @@ static void print_fpga_info(unsigned dev)
printf("FPGA%d: ", dev);
+ FPGA_GET_REG(dev, versions, &versions);
+ FPGA_GET_REG(dev, fpga_version, &fpga_version);
+ FPGA_GET_REG(dev, fpga_features, &fpga_features);
+
hardware_version = versions & 0x000f;
if (fpga_state
@@ -247,8 +252,9 @@ int checkboard(void)
int last_stage_init(void)
{
- struct ihs_fpga *fpga = (struct ihs_fpga *) CONFIG_SYS_FPGA_BASE(0);
- u16 versions = in_le16(&fpga->versions);
+ u16 versions;
+
+ FPGA_GET_REG(0, versions, &versions);
print_fpga_info(0);
if (get_mc2_present())
diff --git a/board/gdsys/405ep/io.c b/board/gdsys/405ep/io.c
index eee9ba0aaa..03d796cdb8 100644
--- a/board/gdsys/405ep/io.c
+++ b/board/gdsys/405ep/io.c
@@ -37,6 +37,8 @@ enum {
HWVER_122 = 3,
};
+struct ihs_fpga *fpga_ptr[] = CONFIG_SYS_FPGA_PTR;
+
int misc_init_r(void)
{
/* startup fans */
@@ -101,15 +103,18 @@ int checkboard(void)
static void print_fpga_info(void)
{
- struct ihs_fpga *fpga = (struct ihs_fpga *) CONFIG_SYS_FPGA_BASE(0);
- u16 versions = in_le16(&fpga->versions);
- u16 fpga_version = in_le16(&fpga->fpga_version);
- u16 fpga_features = in_le16(&fpga->fpga_features);
+ u16 versions;
+ u16 fpga_version;
+ u16 fpga_features;
unsigned unit_type;
unsigned hardware_version;
unsigned feature_channels;
unsigned feature_expansion;
+ FPGA_GET_REG(0, versions, &versions);
+ FPGA_GET_REG(0, fpga_version, &fpga_version);
+ FPGA_GET_REG(0, fpga_features, &fpga_features);
+
unit_type = (versions & 0xf000) >> 12;
hardware_version = versions & 0x000f;
feature_channels = fpga_features & 0x007f;
@@ -163,7 +168,6 @@ static void print_fpga_info(void)
*/
int last_stage_init(void)
{
- struct ihs_fpga *fpga = (struct ihs_fpga *) CONFIG_SYS_FPGA_BASE(0);
unsigned int k;
print_fpga_info();
@@ -175,7 +179,7 @@ int last_stage_init(void)
configure_gbit_phy(k);
/* take fpga serdes blocks out of reset */
- out_le16(&fpga->quad_serdes_reset, 0);
+ FPGA_SET_REG(0, quad_serdes_reset, 0);
return 0;
}
diff --git a/board/gdsys/405ep/iocon.c b/board/gdsys/405ep/iocon.c
index c728bc7b73..1af5245c8a 100644
--- a/board/gdsys/405ep/iocon.c
+++ b/board/gdsys/405ep/iocon.c
@@ -53,6 +53,8 @@ enum {
RAM_DDR2_32 = 0,
};
+struct ihs_fpga *fpga_ptr[] = CONFIG_SYS_FPGA_PTR;
+
/*
* Check Board Identity:
*/
@@ -76,10 +78,9 @@ int checkboard(void)
static void print_fpga_info(void)
{
- struct ihs_fpga *fpga = (struct ihs_fpga *) CONFIG_SYS_FPGA_BASE(0);
- u16 versions = in_le16(&fpga->versions);
- u16 fpga_version = in_le16(&fpga->fpga_version);
- u16 fpga_features = in_le16(&fpga->fpga_features);
+ u16 versions;
+ u16 fpga_version;
+ u16 fpga_features;
unsigned unit_type;
unsigned hardware_version;
unsigned feature_compression;
@@ -90,6 +91,10 @@ static void print_fpga_info(void)
unsigned feature_carriers;
unsigned feature_video_channels;
+ FPGA_GET_REG(0, versions, &versions);
+ FPGA_GET_REG(0, fpga_version, &fpga_version);
+ FPGA_GET_REG(0, fpga_features, &fpga_features);
+
unit_type = (versions & 0xf000) >> 12;
hardware_version = versions & 0x000f;
feature_compression = (fpga_features & 0xe000) >> 13;
@@ -211,20 +216,25 @@ int last_stage_init(void)
/*
* provide access to fpga gpios (for I2C bitbang)
+ * (these may look all too simple but make iocon.h much more readable)
*/
void fpga_gpio_set(int pin)
{
- out_le16((void *)(CONFIG_SYS_FPGA0_BASE + 0x18), pin);
+ FPGA_SET_REG(0, gpio.set, pin);
}
void fpga_gpio_clear(int pin)
{
- out_le16((void *)(CONFIG_SYS_FPGA0_BASE + 0x16), pin);
+ FPGA_SET_REG(0, gpio.clear, pin);
}
int fpga_gpio_get(int pin)
{
- return in_le16((void *)(CONFIG_SYS_FPGA0_BASE + 0x14)) & pin;
+ u16 val;
+
+ FPGA_GET_REG(0, gpio.read, &val);
+
+ return val & pin;
}
void gd405ep_init(void)
diff --git a/board/gdsys/405ep/neo.c b/board/gdsys/405ep/neo.c
index bca78032f8..ff0edb2547 100644
--- a/board/gdsys/405ep/neo.c
+++ b/board/gdsys/405ep/neo.c
@@ -28,6 +28,8 @@ enum {
HWVER_300 = 3,
};
+struct ihs_fpga *fpga_ptr[] = CONFIG_SYS_FPGA_PTR;
+
int misc_init_r(void)
{
/* startup fans */
@@ -54,10 +56,9 @@ int checkboard(void)
static void print_fpga_info(void)
{
- struct ihs_fpga *fpga = (struct ihs_fpga *) CONFIG_SYS_FPGA_BASE(0);
- u16 versions = in_le16(&fpga->versions);
- u16 fpga_version = in_le16(&fpga->fpga_version);
- u16 fpga_features = in_le16(&fpga->fpga_features);
+ u16 versions;
+ u16 fpga_version;
+ u16 fpga_features;
int fpga_state = get_fpga_state(0);
unsigned unit_type;
unsigned hardware_version;
@@ -74,6 +75,10 @@ static void print_fpga_info(void)
return;
}
+ FPGA_GET_REG(0, versions, &versions);
+ FPGA_GET_REG(0, fpga_version, &fpga_version);
+ FPGA_GET_REG(0, fpga_features, &fpga_features);
+
unit_type = (versions & 0xf000) >> 12;
hardware_version = versions & 0x000f;
feature_channels = fpga_features & 0x007f;