diff options
| author | Dirk Eibach <dirk.eibach@gdsys.cc> | 2015-10-28 11:46:32 +0100 |
|---|---|---|
| committer | Tom Rini <trini@konsulko.com> | 2015-11-12 18:03:48 -0500 |
| commit | a3f9d6c7791bbf0ff7fc68d49abcc5b53c6f7e48 (patch) | |
| tree | 070fd5f449eaf864d492a0ffa6c2dbd66582a9ed /board/gdsys/common/osd.c | |
| parent | 51b96fc67c76cddf3937b18380eb45dcfadd7b56 (diff) | |
mpc83xx: Add strider board
The gdsys strider board is based on a Freescale MPC8308 SOC.
It boots from NOR-Flash, kernel and rootfs are stored on
SD-Card.
On board peripherals include:
- 1x 10/100 Mbit/s Ethernet (optional)
- Lattice ECP3 FPGA connected via eLBC
Signed-off-by: Dirk Eibach <dirk.eibach@gdsys.cc>
[trini: Drop setting CONFIG_SYS_GENERIC_BOARD, this is always true now]
Signed-off-by: Tom Rini <trini@konsulko.com>
Diffstat (limited to 'board/gdsys/common/osd.c')
| -rw-r--r-- | board/gdsys/common/osd.c | 43 |
1 files changed, 3 insertions, 40 deletions
diff --git a/board/gdsys/common/osd.c b/board/gdsys/common/osd.c index 55ecdf1012..f11e26f5fa 100644 --- a/board/gdsys/common/osd.c +++ b/board/gdsys/common/osd.c @@ -9,11 +9,10 @@ #include <i2c.h> #include <malloc.h> +#include "ch7301.h" #include "dp501.h" #include <gdsys_fpga.h> -#define CH7301_I2C_ADDR 0x75 - #define ICS8N3QV01_I2C_ADDR 0x6E #define ICS8N3QV01_FREF 114285000 #define ICS8N3QV01_FREF_LL 114285000LL @@ -29,27 +28,6 @@ #define PIXCLK_640_480_60 25180000 -enum { - CH7301_CM = 0x1c, /* Clock Mode Register */ - CH7301_IC = 0x1d, /* Input Clock Register */ - CH7301_GPIO = 0x1e, /* GPIO Control Register */ - CH7301_IDF = 0x1f, /* Input Data Format Register */ - CH7301_CD = 0x20, /* Connection Detect Register */ - CH7301_DC = 0x21, /* DAC Control Register */ - CH7301_HPD = 0x23, /* Hot Plug Detection Register */ - CH7301_TCTL = 0x31, /* DVI Control Input Register */ - CH7301_TPCP = 0x33, /* DVI PLL Charge Pump Ctrl Register */ - CH7301_TPD = 0x34, /* DVI PLL Divide Register */ - CH7301_TPVT = 0x35, /* DVI PLL Supply Control Register */ - CH7301_TPF = 0x36, /* DVI PLL Filter Register */ - CH7301_TCT = 0x37, /* DVI Clock Test Register */ - CH7301_TSTP = 0x48, /* Test Pattern Register */ - CH7301_PM = 0x49, /* Power Management register */ - CH7301_VID = 0x4a, /* Version ID Register */ - CH7301_DID = 0x4b, /* Device ID Register */ - CH7301_DSP = 0x56, /* DVI Sync polarity Register */ -}; - unsigned int base_width; unsigned int base_height; size_t bufsize; @@ -61,10 +39,6 @@ unsigned int max_osd_screen = CONFIG_SYS_OSD_SCREENS - 1; int ics8n3qv01_i2c[] = CONFIG_SYS_ICS8N3QV01_I2C; #endif -#ifdef CONFIG_SYS_CH7301_I2C -int ch7301_i2c[] = CONFIG_SYS_CH7301_I2C; -#endif - #ifdef CONFIG_SYS_SIL1178_I2C int sil1178_i2c[] = CONFIG_SYS_SIL1178_I2C; #endif @@ -327,19 +301,8 @@ int osd_probe(unsigned screen) /* setup output driver */ #ifdef CONFIG_SYS_CH7301_I2C - i2c_set_bus_num(ch7301_i2c[screen]); - if (!i2c_probe(CH7301_I2C_ADDR)) { - u8 value = i2c_reg_read(CH7301_I2C_ADDR, CH7301_DID); - - if (value == 0x17) { - i2c_reg_write(CH7301_I2C_ADDR, CH7301_TPCP, 0x08); - i2c_reg_write(CH7301_I2C_ADDR, CH7301_TPD, 0x16); - i2c_reg_write(CH7301_I2C_ADDR, CH7301_TPF, 0x60); - i2c_reg_write(CH7301_I2C_ADDR, CH7301_DC, 0x09); - i2c_reg_write(CH7301_I2C_ADDR, CH7301_PM, 0xc0); - output_driver_present = true; - } - } + if (!ch7301_probe(screen, true)) + output_driver_present = true; #endif #ifdef CONFIG_SYS_SIL1178_I2C |