diff options
| author | Dirk Eibach <dirk.eibach@gdsys.cc> | 2015-10-28 11:46:35 +0100 |
|---|---|---|
| committer | Tom Rini <trini@konsulko.com> | 2015-11-12 18:04:10 -0500 |
| commit | 7ed45d3d0a1deec19dd44d3590b779fc128ced8c (patch) | |
| tree | 572406355d0bc559145dbf5dd36d439f63de16b0 /board/gdsys/mpc8308/hrcon.c | |
| parent | b847f5b622e3d2e98a0164753c2890843bc0d93e (diff) | |
hrcon: Add support for the DH variant
hrcon DH(dual head) has two video outputs per FPGA.
Signed-off-by: Dirk Eibach <dirk.eibach@gdsys.cc>
Diffstat (limited to 'board/gdsys/mpc8308/hrcon.c')
| -rw-r--r-- | board/gdsys/mpc8308/hrcon.c | 31 |
1 files changed, 27 insertions, 4 deletions
diff --git a/board/gdsys/mpc8308/hrcon.c b/board/gdsys/mpc8308/hrcon.c index 5492718c52..3cc03cbdad 100644 --- a/board/gdsys/mpc8308/hrcon.c +++ b/board/gdsys/mpc8308/hrcon.c @@ -128,6 +128,7 @@ int last_stage_init(void) /* Turn on Parade DP501 */ pca9698_direction_output(0x20, 10, 1); + pca9698_direction_output(0x20, 11, 1); ch0_rgmii2_present = !pca9698_get_value(0x20, 30); @@ -174,6 +175,9 @@ int last_stage_init(void) ioep_fpga_print_info(0); osd_probe(0); +#ifdef CONFIG_SYS_OSD_DH + osd_probe(4); +#endif if (slaves <= 0) return 0; @@ -185,6 +189,9 @@ int last_stage_init(void) ioep_fpga_print_info(k); osd_probe(k); +#ifdef CONFIG_SYS_OSD_DH + osd_probe(k + 4); +#endif if (hw_type_cat) { miiphy_register(bb_miiphy_buses[k].name, bb_miiphy_read, bb_miiphy_write); @@ -196,28 +203,44 @@ int last_stage_init(void) } /* - * provide access to fpga gpios (for I2C bitbang) + * provide access to fpga gpios and controls (for I2C bitbang) * (these may look all too simple but make iocon.h much more readable) */ void fpga_gpio_set(unsigned int bus, int pin) { - FPGA_SET_REG(bus, gpio.set, pin); + FPGA_SET_REG(bus >= 4 ? (bus - 4) : bus, gpio.set, pin); } void fpga_gpio_clear(unsigned int bus, int pin) { - FPGA_SET_REG(bus, gpio.clear, pin); + FPGA_SET_REG(bus >= 4 ? (bus - 4) : bus, gpio.clear, pin); } int fpga_gpio_get(unsigned int bus, int pin) { u16 val; - FPGA_GET_REG(bus, gpio.read, &val); + FPGA_GET_REG(bus >= 4 ? (bus - 4) : bus, gpio.read, &val); return val & pin; } +void fpga_control_set(unsigned int bus, int pin) +{ + u16 val; + + FPGA_GET_REG(bus >= 4 ? (bus - 4) : bus, control, &val); + FPGA_SET_REG(bus >= 4 ? (bus - 4) : bus, control, val | pin); +} + +void fpga_control_clear(unsigned int bus, int pin) +{ + u16 val; + + FPGA_GET_REG(bus >= 4 ? (bus - 4) : bus, control, &val); + FPGA_SET_REG(bus >= 4 ? (bus - 4) : bus, control, val & ~pin); +} + void mpc8308_init(void) { pca9698_direction_output(0x20, 4, 1); |