diff options
author | Ian Ray <ian.ray@ge.com> | 2018-04-25 16:57:00 +0200 |
---|---|---|
committer | Stefano Babic <sbabic@denx.de> | 2018-05-17 11:54:24 +0200 |
commit | 70168a736687f09de00ad965593041232c2f3db1 (patch) | |
tree | 08ea36eabbef7747ddbf637600c164eb82a4c6b1 /board/ge | |
parent | 5ce9a1c84fdf6a4562a5072fcd95076e9cc333d6 (diff) |
board: ge: bx50v3: fix display support for b{46}50v3
Enable Video PLL to fix non-working display support for Bx50v3
internal displays.
Signed-off-by: Ian Ray <ian.ray@ge.com>
Signed-off-by: Nandor Han <nandor.han@ge.com>
Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.co.uk>
Diffstat (limited to 'board/ge')
-rw-r--r-- | board/ge/bx50v3/bx50v3.c | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/board/ge/bx50v3/bx50v3.c b/board/ge/bx50v3/bx50v3.c index be6a9fc470..478699aec9 100644 --- a/board/ge/bx50v3/bx50v3.c +++ b/board/ge/bx50v3/bx50v3.c @@ -492,6 +492,8 @@ static void setup_display_bx50v3(void) struct mxc_ccm_reg *mxc_ccm = (struct mxc_ccm_reg *)CCM_BASE_ADDR; struct iomuxc *iomux = (struct iomuxc *)IOMUXC_BASE_ADDR; + enable_videopll(); + /* When a reset/reboot is performed the display power needs to be turned * off for atleast 500ms. The boot time is ~300ms, we need to wait for * an additional 200ms here. Unfortunately we use external PMIC for |