diff options
| author | Peter Griffin <peter.griffin@linaro.org> | 2016-04-20 17:14:02 +0100 |
|---|---|---|
| committer | Tom Rini <trini@konsulko.com> | 2016-04-25 15:10:35 -0400 |
| commit | 305b90919ea8c17edeb1e7d15ae5ca43f36bddc2 (patch) | |
| tree | 78f105482747484a53a4ee58e9ff44b2e9ee4b90 /board/hisilicon | |
| parent | 7e4902d47933eeeadb2eb5505683ffafa96691b7 (diff) | |
ARM: hisilicon: hikey: Align memory node with upstream kernel
The memory node gets automatically generated by U-Boot
in arch_fixup_fdt(), before passing control to the kernel
using U-Boots representation of the dram banks.
However the upstream kernel uses the memory node to carve-out
regions of RAM for various purposes. To make this work without
changing arch_fixup_fdt() which will effect many platforms
we replicate the upstream memory node layout using the dram
banks.
Signed-off-by: Peter Griffin <peter.griffin@linaro.org>
Reviewed-by: Tom Rini <trini@konsulko.com>
Diffstat (limited to 'board/hisilicon')
| -rw-r--r-- | board/hisilicon/hikey/hikey.c | 30 |
1 files changed, 29 insertions, 1 deletions
diff --git a/board/hisilicon/hikey/hikey.c b/board/hisilicon/hikey/hikey.c index 752ee6f991..7abc67874a 100644 --- a/board/hisilicon/hikey/hikey.c +++ b/board/hisilicon/hikey/hikey.c @@ -410,8 +410,36 @@ int dram_init(void) void dram_init_banksize(void) { + /* + * Reserve regions below from DT memory node (which gets generated + * by U-Boot from the dram banks in arch_fixup_fdt() before booting + * the kernel. This will then match the kernel hikey dts memory node. + * + * 0x05e0,0000 - 0x05ef,ffff: MCU firmware runtime using + * 0x05f0,1000 - 0x05f0,1fff: Reboot reason + * 0x06df,f000 - 0x06df,ffff: Mailbox message data + * 0x0740,f000 - 0x0740,ffff: MCU firmware section + * 0x21f0,0000 - 0x21ff,ffff: pstore/ramoops buffer + * 0x3e00,0000 - 0x3fff,ffff: OP-TEE + */ + gd->bd->bi_dram[0].start = PHYS_SDRAM_1; - gd->bd->bi_dram[0].size = PHYS_SDRAM_1_SIZE; + gd->bd->bi_dram[0].size = 0x05e00000; + + gd->bd->bi_dram[1].start = 0x05f00000; + gd->bd->bi_dram[1].size = 0x00001000; + + gd->bd->bi_dram[2].start = 0x05f02000; + gd->bd->bi_dram[2].size = 0x00efd000; + + gd->bd->bi_dram[3].start = 0x06e00000; + gd->bd->bi_dram[3].size = 0x0060f000; + + gd->bd->bi_dram[4].start = 0x07410000; + gd->bd->bi_dram[4].size = 0x1aaf0000; + + gd->bd->bi_dram[5].start = 0x22000000; + gd->bd->bi_dram[5].size = 0x1c000000; } void reset_cpu(ulong addr) |