diff options
| author | Heiko Schocher <hs@denx.de> | 2009-04-27 10:48:20 +0200 |
|---|---|---|
| committer | Wolfgang Denk <wd@denx.de> | 2009-04-28 01:22:59 +0200 |
| commit | 28afe0160f87ff74574150d703055a965f91422a (patch) | |
| tree | 6345791ad782236c444e63b476752a8ef4ddd5bc /board/ids8247/ids8247.c | |
| parent | dbd33614404b65aa441c5620c3dbd560c4460c09 (diff) | |
ids8247: Remove legacy NAND defines
because legacy NAND support is deprecated converting to current
NAND interface. !This just compile, because I have no more the
hardware to test it.
Signed-off-by: Heiko Schocher <hs@denx.de>
Diffstat (limited to 'board/ids8247/ids8247.c')
| -rw-r--r-- | board/ids8247/ids8247.c | 92 |
1 files changed, 84 insertions, 8 deletions
diff --git a/board/ids8247/ids8247.c b/board/ids8247/ids8247.c index 68b70703f0..79fe9da5ba 100644 --- a/board/ids8247/ids8247.c +++ b/board/ids8247/ids8247.c @@ -304,21 +304,97 @@ phys_size_t initdram (int board_type) int misc_init_r (void) { gd->bd->bi_flashstart = 0xff800000; + return 0; } #if defined(CONFIG_CMD_NAND) -extern ulong -nand_probe (ulong physadr); +#include <nand.h> +#include <linux/mtd/mtd.h> +#include <asm/io.h> + +static u8 hwctl; + +static void ids_nand_hwctrl(struct mtd_info *mtd, int cmd, unsigned int ctrl) +{ + struct nand_chip *this = mtd->priv; + + if (ctrl & NAND_CTRL_CHANGE) { + if ( ctrl & NAND_CLE ) { + hwctl |= 0x1; + writeb(0x00, (this->IO_ADDR_W + 0x0a)); + } else { + hwctl &= ~0x1; + writeb(0x00, (this->IO_ADDR_W + 0x08)); + } + if ( ctrl & NAND_ALE ) { + hwctl |= 0x2; + writeb(0x00, (this->IO_ADDR_W + 0x09)); + } else { + hwctl &= ~0x2; + writeb(0x00, (this->IO_ADDR_W + 0x08)); + } + if ( (ctrl & NAND_NCE) != NAND_NCE) + writeb(0x00, (this->IO_ADDR_W + 0x0c)); + else + writeb(0x00, (this->IO_ADDR_W + 0x08)); + } + if (cmd != NAND_CMD_NONE) + writeb(cmd, this->IO_ADDR_W); + +} -void -nand_init (void) +static u_char ids_nand_read_byte(struct mtd_info *mtd) { - ulong totlen = 0; + struct nand_chip *this = mtd->priv; - debug ("Probing at 0x%.8x\n", CONFIG_SYS_NAND0_BASE); - totlen += nand_probe (CONFIG_SYS_NAND0_BASE); + return readb(this->IO_ADDR_R); +} + +static void ids_nand_write_buf(struct mtd_info *mtd, const u_char *buf, int len) +{ + struct nand_chip *nand = mtd->priv; + int i; + + for (i = 0; i < len; i++) { + if (hwctl & 0x1) + writeb(buf[i], (nand->IO_ADDR_W + 0x02)); + else if (hwctl & 0x2) + writeb(buf[i], (nand->IO_ADDR_W + 0x01)); + else + writeb(buf[i], nand->IO_ADDR_W); + } +} - printf ("%4lu MB\n", totlen >>20); +static void ids_nand_read_buf(struct mtd_info *mtd, u_char *buf, int len) +{ + struct nand_chip *this = mtd->priv; + int i; + + for (i = 0; i < len; i++) { + buf[i] = readb(this->IO_ADDR_R); + } +} + +static int ids_nand_dev_ready(struct mtd_info *mtd) +{ + /* constant delay (see also tR in the datasheet) */ + udelay(12); + return 1; +} + +int board_nand_init(struct nand_chip *nand) +{ + nand->ecc.mode = NAND_ECC_SOFT; + + /* Reference hardware control function */ + nand->cmd_ctrl = ids_nand_hwctrl; + nand->read_byte = ids_nand_read_byte; + nand->write_buf = ids_nand_write_buf; + nand->read_buf = ids_nand_read_buf; + nand->dev_ready = ids_nand_dev_ready; + nand->chip_delay = 12; + + return 0; } #endif /* CONFIG_CMD_NAND */ |