diff options
author | Ladislav Michl <ladis@linux-mips.org> | 2017-08-17 03:06:45 +0200 |
---|---|---|
committer | Tom Rini <trini@konsulko.com> | 2017-08-26 14:56:12 -0400 |
commit | 4c699a4747e763e82cc813c955d318b966303b81 (patch) | |
tree | 49a159f42bfb7de38ae5f884e092b0c1cab5cb03 /board/isee/igep00x0/common.c | |
parent | ea8c7fcacc5eeb7b1ae53a26f201efaae3e8ceb7 (diff) |
igep00x0: move SPL routines into separate file
Avoid cluttering board file with CONFIG_SPL_BUILD ifdefs
by moving SPL related functions into separate file.
Signed-off-by: Ladislav Michl <ladis@linux-mips.org>
Tested-by: Pau Pajuelo <ppajuel@gmail.com>
Acked-by: Enric Balletbo i Serra <enric.balletbo@collabora.com>
Diffstat (limited to 'board/isee/igep00x0/common.c')
-rw-r--r-- | board/isee/igep00x0/common.c | 80 |
1 files changed, 80 insertions, 0 deletions
diff --git a/board/isee/igep00x0/common.c b/board/isee/igep00x0/common.c new file mode 100644 index 0000000000..b8f1c14f6a --- /dev/null +++ b/board/isee/igep00x0/common.c @@ -0,0 +1,80 @@ +/* + * SPDX-License-Identifier: GPL-2.0+ + */ +#include <common.h> +#include <twl4030.h> +#include <asm/io.h> +#include <asm/omap_mmc.h> +#include <asm/arch/mux.h> +#include <asm/arch/sys_proto.h> +#include <jffs2/load_kernel.h> +#include <linux/mtd/nand.h> +#include "igep00x0.h" + +DECLARE_GLOBAL_DATA_PTR; + +/* + * Routine: set_muxconf_regs + * Description: Setting up the configuration Mux registers specific to the + * hardware. Many pins need to be moved from protect to primary + * mode. + */ +void set_muxconf_regs(void) +{ + MUX_DEFAULT(); + +#if (CONFIG_MACH_TYPE == MACH_TYPE_IGEP0020) + MUX_IGEP0020(); +#endif + +#if (CONFIG_MACH_TYPE == MACH_TYPE_IGEP0030) + MUX_IGEP0030(); +#endif +} + +/* + * Routine: board_init + * Description: Early hardware init. + */ +int board_init(void) +{ + int loops = 100; + + /* find out flash memory type, assume NAND first */ + gpmc_cs0_flash = MTD_DEV_TYPE_NAND; + gpmc_init(); + + /* Issue a RESET and then READID */ + writeb(NAND_CMD_RESET, &gpmc_cfg->cs[0].nand_cmd); + writeb(NAND_CMD_STATUS, &gpmc_cfg->cs[0].nand_cmd); + while ((readl(&gpmc_cfg->cs[0].nand_dat) & NAND_STATUS_READY) + != NAND_STATUS_READY) { + udelay(1); + if (--loops == 0) { + gpmc_cs0_flash = MTD_DEV_TYPE_ONENAND; + gpmc_init(); /* reinitialize for OneNAND */ + break; + } + } + + /* boot param addr */ + gd->bd->bi_boot_params = (OMAP34XX_SDRC_CS0 + 0x100); + +#if defined(CONFIG_LED_STATUS) && defined(CONFIG_LED_STATUS_BOOT_ENABLE) + status_led_set(CONFIG_LED_STATUS_BOOT, CONFIG_LED_STATUS_ON); +#endif + + return 0; +} + +#if defined(CONFIG_MMC) +int board_mmc_init(bd_t *bis) +{ + return omap_mmc_init(0, 0, 0, -1, -1); +} + +void board_mmc_power_init(void) +{ + twl4030_power_mmc_init(0); +} +#endif |