diff options
| author | Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> | 2008-10-16 15:01:15 +0200 |
|---|---|---|
| committer | Wolfgang Denk <wd@denx.de> | 2008-10-18 21:54:03 +0200 |
| commit | 6d0f6bcf337c5261c08fabe12982178c2c489d76 (patch) | |
| tree | ae13958ffa9c6b58c2ea97aac07a4ad2f04a350f /board/ixdp425 | |
| parent | 71edc271816ec82cf0550dd6980be2da3cc2ad9e (diff) | |
rename CFG_ macros to CONFIG_SYS
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Diffstat (limited to 'board/ixdp425')
| -rw-r--r-- | board/ixdp425/flash.c | 18 | ||||
| -rw-r--r-- | board/ixdp425/ixdp425.c | 20 |
2 files changed, 19 insertions, 19 deletions
diff --git a/board/ixdp425/flash.c b/board/ixdp425/flash.c index 0bae9e09ee..f1d9190eac 100644 --- a/board/ixdp425/flash.c +++ b/board/ixdp425/flash.c @@ -28,7 +28,7 @@ #include <linux/byteorder/swab.h> -flash_info_t flash_info[CFG_MAX_FLASH_BANKS]; /* info for FLASH chips */ +flash_info_t flash_info[CONFIG_SYS_MAX_FLASH_BANKS]; /* info for FLASH chips */ /* Board support for 1 or 2 flash devices */ #undef FLASH_PORT_WIDTH32 @@ -65,7 +65,7 @@ unsigned long flash_init (void) int i; ulong size = 0; - for (i = 0; i < CFG_MAX_FLASH_BANKS; i++) { + for (i = 0; i < CONFIG_SYS_MAX_FLASH_BANKS; i++) { switch (i) { case 0: flash_get_size ((FPW *) PHYS_FLASH_1, &flash_info[i]); @@ -81,8 +81,8 @@ unsigned long flash_init (void) /* Protect monitor and environment sectors */ flash_protect (FLAG_PROTECT_SET, - CFG_FLASH_BASE, - CFG_FLASH_BASE + _bss_start - _armboot_start, + CONFIG_SYS_FLASH_BASE, + CONFIG_SYS_FLASH_BASE + _bss_start - _armboot_start, &flash_info[0]); flash_protect (FLAG_PROTECT_SET, @@ -198,10 +198,10 @@ static ulong flash_get_size (FPW * addr, flash_info_t * info) break; } - if (info->sector_count > CFG_MAX_FLASH_SECT) { + if (info->sector_count > CONFIG_SYS_MAX_FLASH_SECT) { printf ("** ERROR: sector count %d > max (%d) **\n", - info->sector_count, CFG_MAX_FLASH_SECT); - info->sector_count = CFG_MAX_FLASH_SECT; + info->sector_count, CONFIG_SYS_MAX_FLASH_SECT); + info->sector_count = CONFIG_SYS_MAX_FLASH_SECT; } addr[0] = (FPW) 0x00FF00FF; /* restore read mode */ @@ -270,7 +270,7 @@ int flash_erase (flash_info_t * info, int s_first, int s_last) *addr) & (FPW) 0x00800080) != (FPW) 0x00800080) { if (get_timer_masked () > - CFG_FLASH_ERASE_TOUT) { + CONFIG_SYS_FLASH_ERASE_TOUT) { printf ("Timeout\n"); *addr = (FPW) 0x00B000B0; /* suspend erase */ *addr = (FPW) 0x00FF00FF; /* reset to read mode */ @@ -406,7 +406,7 @@ static int write_data (flash_info_t * info, ulong dest, FPW data) /* wait while polling the status register */ while (((status = *addr) & (FPW) 0x00800080) != (FPW) 0x00800080) { - if (get_timer_masked () > CFG_FLASH_WRITE_TOUT) { + if (get_timer_masked () > CONFIG_SYS_FLASH_WRITE_TOUT) { *addr = (FPW) 0x00FF00FF; /* restore read mode */ return (1); } diff --git a/board/ixdp425/ixdp425.c b/board/ixdp425/ixdp425.c index b379c7535f..43ac8f6a42 100644 --- a/board/ixdp425/ixdp425.c +++ b/board/ixdp425/ixdp425.c @@ -54,25 +54,25 @@ int board_init (void) /* * Get realtek RTL8305 switch and SLIC out of reset */ - GPIO_OUTPUT_SET(CFG_GPIO_SWITCH_RESET_N); - GPIO_OUTPUT_ENABLE(CFG_GPIO_SWITCH_RESET_N); - GPIO_OUTPUT_SET(CFG_GPIO_SLIC_RESET_N); - GPIO_OUTPUT_ENABLE(CFG_GPIO_SLIC_RESET_N); + GPIO_OUTPUT_SET(CONFIG_SYS_GPIO_SWITCH_RESET_N); + GPIO_OUTPUT_ENABLE(CONFIG_SYS_GPIO_SWITCH_RESET_N); + GPIO_OUTPUT_SET(CONFIG_SYS_GPIO_SLIC_RESET_N); + GPIO_OUTPUT_ENABLE(CONFIG_SYS_GPIO_SLIC_RESET_N); /* * Setup GPIO's for PCI INTA & INTB */ - GPIO_OUTPUT_DISABLE(CFG_GPIO_PCI_INTA_N); - GPIO_INT_ACT_LOW_SET(CFG_GPIO_PCI_INTA_N); - GPIO_OUTPUT_DISABLE(CFG_GPIO_PCI_INTB_N); - GPIO_INT_ACT_LOW_SET(CFG_GPIO_PCI_INTB_N); + GPIO_OUTPUT_DISABLE(CONFIG_SYS_GPIO_PCI_INTA_N); + GPIO_INT_ACT_LOW_SET(CONFIG_SYS_GPIO_PCI_INTA_N); + GPIO_OUTPUT_DISABLE(CONFIG_SYS_GPIO_PCI_INTB_N); + GPIO_INT_ACT_LOW_SET(CONFIG_SYS_GPIO_PCI_INTB_N); /* * Setup GPIO's for 33MHz clock output */ *IXP425_GPIO_GPCLKR = 0x01FF01FF; - GPIO_OUTPUT_ENABLE(CFG_GPIO_PCI_CLK); - GPIO_OUTPUT_ENABLE(CFG_GPIO_EXTBUS_CLK); + GPIO_OUTPUT_ENABLE(CONFIG_SYS_GPIO_PCI_CLK); + GPIO_OUTPUT_ENABLE(CONFIG_SYS_GPIO_EXTBUS_CLK); #endif return 0; |