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authorwdenk <wdenk>2004-12-31 09:32:47 +0000
committerwdenk <wdenk>2004-12-31 09:32:47 +0000
commite2ffd59b4d93c9149de1caaa087371b0cfc512c9 (patch)
tree86cfb6e30bec1686253b0542d76f57c5d62d183a /board/jse/host_bridge.c
parent400ab719c6025c176c50bcdff342384222d7424b (diff)
* Code cleanup, mostly for GCC-3.3.x
* Cleanup confusing use of CONFIG_ETH*ADDR - ust his only to pre-define a MAC address; use CONFIG_HAS_ETH* to enable support for additional ethernet addresses. * Cleanup drivers/i82365.c - avoid duplication of code * Fix bogus "cannot span across banks" flash error message * Add support for CompactFlash for the CPC45 Board.
Diffstat (limited to 'board/jse/host_bridge.c')
-rw-r--r--board/jse/host_bridge.c2
1 files changed, 0 insertions, 2 deletions
diff --git a/board/jse/host_bridge.c b/board/jse/host_bridge.c
index 11c41bdada..363be97a59 100644
--- a/board/jse/host_bridge.c
+++ b/board/jse/host_bridge.c
@@ -39,8 +39,6 @@ void host_bridge_init (void)
/* The bridge chip is at a fixed location. */
pci_dev_t dev = PCI_BDF (0, 10, 0);
- int rc;
-
/* Set PCI Class code --
The primary side sees this class code at 0x08 in the
primary config space. This must be something other then a