diff options
| author | Haavard Skinnemoen <haavard.skinnemoen@atmel.com> | 2008-08-31 18:07:35 +0200 |
|---|---|---|
| committer | Haavard Skinnemoen <haavard.skinnemoen@atmel.com> | 2008-09-01 14:21:34 +0200 |
| commit | abdde2b1d570b1ee77606bf783444fcddf7f0965 (patch) | |
| tree | 4fe0f65ab293ea8776f6261e44e5bb93c70d9d11 /board/miromico | |
| parent | 98090cd75cdb40b2ab94c806c338540a5716748b (diff) | |
hammerhead: Use gclk helper functions
Use the new gclk helper functions to set up the PHY clock instead of
accessing the PM registers directly.
Signed-off-by: Haavard Skinnemoen <haavard.skinnemoen@atmel.com>
Diffstat (limited to 'board/miromico')
| -rw-r--r-- | board/miromico/hammerhead/hammerhead.c | 10 |
1 files changed, 2 insertions, 8 deletions
diff --git a/board/miromico/hammerhead/hammerhead.c b/board/miromico/hammerhead/hammerhead.c index 3d6cf9b28b..bf432cba85 100644 --- a/board/miromico/hammerhead/hammerhead.c +++ b/board/miromico/hammerhead/hammerhead.c @@ -22,8 +22,6 @@ * MA 02111-1307 USA */ -#include "../cpu/at32ap/at32ap700x/sm.h" - #include <common.h> #include <asm/io.h> @@ -105,10 +103,6 @@ void board_init_info(void) void gclk_init(void) { /* Hammerhead boards uses GCLK3 as 25MHz output to ethernet PHY */ - - /* Select GCLK3 peripheral function */ - portmux_select_peripheral(PORTMUX_PORT_B, 1 << 29, PORTMUX_FUNC_A, 0); - - /* Enable GCLK3 with no input divider, from OSC0 (crystal) */ - sm_writel(PM_GCCTRL(3), SM_BIT(CEN)); + gclk_enable_output(3, PORTMUX_DRIVE_LOW); + gclk_set_rate(3, GCLK_PARENT_OSC0, 25000000); } |