diff options
| author | Matthias Fuchs <matthias.fuchs@esd.eu> | 2009-07-22 17:27:56 +0200 |
|---|---|---|
| committer | Stefan Roese <sr@denx.de> | 2009-07-24 06:47:17 +0200 |
| commit | 58ea142fb2e969f32306c8da1dabfaebd6fa141a (patch) | |
| tree | 6f6054a161a5c439b29e85f874531093390623bc /board/mpl/pip405/pip405.c | |
| parent | 87c0b72908e05662b8b415e26e1042f4779629da (diff) | |
ppc4xx: Replace 4xx lowercase SPR references
Signed-off-by: Matthias Fuchs <matthias.fuchs@esd.eu>
Signed-off-by: Stefan Roese <sr@denx.de>
Diffstat (limited to 'board/mpl/pip405/pip405.c')
| -rw-r--r-- | board/mpl/pip405/pip405.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/board/mpl/pip405/pip405.c b/board/mpl/pip405/pip405.c index f31a5e8f87..677437d09e 100644 --- a/board/mpl/pip405/pip405.c +++ b/board/mpl/pip405/pip405.c @@ -669,7 +669,7 @@ int misc_init_r (void) /* if PIP405 has booted from PCI, reset CCR0[24] as described in errata PCI_18 */ if (mfdcr(strap) & PSR_ROM_LOC) - mtspr(ccr0, (mfspr(ccr0) & ~0x80)); + mtspr(SPRN_CCR0, (mfspr(SPRN_CCR0) & ~0x80)); return (0); } |