diff options
author | Gregory CLEMENT <gregory.clement@bootlin.com> | 2018-12-14 16:16:50 +0100 |
---|---|---|
committer | Daniel Schwierzeck <daniel.schwierzeck@gmail.com> | 2018-12-19 15:23:01 +0100 |
commit | f8c8cedd7ad377cb2a00d35d94dec0dd260117cc (patch) | |
tree | 690a9fc813d3e3d8a639a1839e2cea3cc1ba078d /board/mscc/luton/luton.c | |
parent | 6787c1ece07f771629ea5b463a362f9b4c40d2c0 (diff) |
MSCC: add board support for the Luton based evaluation board
Adding the support for the Luton boards PCB91 which share common code with
the Ocelots boards, including board code, device tree and configuration.
Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com>
Diffstat (limited to 'board/mscc/luton/luton.c')
-rw-r--r-- | board/mscc/luton/luton.c | 28 |
1 files changed, 28 insertions, 0 deletions
diff --git a/board/mscc/luton/luton.c b/board/mscc/luton/luton.c new file mode 100644 index 0000000000..41fc6d56a7 --- /dev/null +++ b/board/mscc/luton/luton.c @@ -0,0 +1,28 @@ +// SPDX-License-Identifier: (GPL-2.0+ OR MIT) +/* + * Copyright (c) 2018 Microsemi Corporation + */ + +#include <common.h> +#include <asm/io.h> + +#define MSCC_GPIO_ALT0 0x88 +#define MSCC_GPIO_ALT1 0x8C + +DECLARE_GLOBAL_DATA_PTR; + +void board_debug_uart_init(void) +{ + /* too early for the pinctrl driver, so configure the UART pins here */ + setbits_le32(BASE_DEVCPU_GCB + MSCC_GPIO_ALT0, BIT(30) | BIT(31)); +} + +int board_early_init_r(void) +{ + /* Prepare SPI controller to be used in master mode */ + writel(0, BASE_CFG + ICPU_SW_MODE); + + /* Address of boot parameters */ + gd->bd->bi_boot_params = CONFIG_SYS_SDRAM_BASE; + return 0; +} |