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authorTom Warren <twarren@nvidia.com>2011-09-21 12:40:07 +0000
committerAlbert ARIBAUD <albert.u.boot@aribaud.net>2011-10-27 21:56:29 +0200
commitccf7988b9ace671085a7ae6e7317c6a378c4a309 (patch)
tree3276519f7a7c8cc32fd32479d5bbe3707c6d80e5 /board/nvidia/seaboard
parent20e18e051fc42774c27f07200a389edfd4606c67 (diff)
tegra2: Enable MMC for Seaboard
This adds the required GPIO and pinmux configuration to make eMMC / SD work on Seaboard. Signed-off-by: Simon Glass <sjg@chromium.org> Tested-by: Tom Warren <twarren@nvidia.com>
Diffstat (limited to 'board/nvidia/seaboard')
-rw-r--r--board/nvidia/seaboard/seaboard.c35
1 files changed, 34 insertions, 1 deletions
diff --git a/board/nvidia/seaboard/seaboard.c b/board/nvidia/seaboard/seaboard.c
index 4b9a8f33e8..bc67d0f94c 100644
--- a/board/nvidia/seaboard/seaboard.c
+++ b/board/nvidia/seaboard/seaboard.c
@@ -24,7 +24,10 @@
#include <common.h>
#include <asm/io.h>
#include <asm/arch/tegra2.h>
-#include <asm/arch/gpio.h>
+#include <asm/gpio.h>
+#ifdef CONFIG_TEGRA2_MMC
+#include <mmc.h>
+#endif
/*
* Routine: gpio_config_uart
@@ -50,3 +53,33 @@ void gpio_config_uart(void)
val |= 1 << GPIO_BIT(gp);
writel(val, &bank->gpio_dir_out[GPIO_PORT(gp)]);
}
+
+#ifdef CONFIG_TEGRA2_MMC
+/*
+ * Routine: gpio_config_mmc
+ * Description: Set GPIOs for SDMMC3 SDIO slot.
+ */
+void gpio_config_mmc(void)
+{
+ /* Set EN_VDDIO_SD (GPIO I6) */
+ gpio_direction_output(GPIO_PI6, 1);
+
+ /* Config pin as GPI for Card Detect (GPIO I5) */
+ gpio_direction_input(GPIO_PI5);
+}
+
+/* this is a weak define that we are overriding */
+int board_mmc_getcd(u8 *cd, struct mmc *mmc)
+{
+ debug("board_mmc_getcd called\n");
+ *cd = 1; /* Assume card is inserted, or eMMC */
+
+ if (IS_SD(mmc)) {
+ /* Seaboard SDMMC3 = SDIO3_CD = GPIO_PI5 */
+ if (gpio_get_value(GPIO_PI5))
+ *cd = 0;
+ }
+
+ return 0;
+}
+#endif