diff options
| author | Peter Chubb <Peter.Chubb@data61.csiro.au> | 2016-08-30 22:54:46 +0000 |
|---|---|---|
| committer | Tom Warren <twarren@nvidia.com> | 2016-09-01 09:24:30 -0700 |
| commit | b615267633996a9410a88b54a55965d8b021f6f8 (patch) | |
| tree | 2a3e8377ac5ef72bbc1fae56da520513c0971891 /board/nvidia/venice2/as3722_init.h | |
| parent | 7932d3e4a7d23c8b9b9ecd50f1869eaf3e46ed49 (diff) | |
ARM: tegra: Add support for TK1-SOM board from Colorado Engineering
The Colorado TK1 SOM is a small form factor board similar to the
Jetson TK1. The main differences lie in the pinmux, and in that the
PCIe controller is set to use in 4lanes+1lane, rather than 2+2.
The pinmux header here was generated from a spreadsheet provided by
Colorado Engineering using the tegra-pinmux scripts. The spreadsheet
was converted from v09 to v11 by me.
Signed-off-by: Peter Chubb <peter.chubb@data61.csiro.au>
Acked-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Tom Warren <twarren@nvidia.com>
Diffstat (limited to 'board/nvidia/venice2/as3722_init.h')
| -rw-r--r-- | board/nvidia/venice2/as3722_init.h | 8 |
1 files changed, 4 insertions, 4 deletions
diff --git a/board/nvidia/venice2/as3722_init.h b/board/nvidia/venice2/as3722_init.h index c6b1247149..30fb132c77 100644 --- a/board/nvidia/venice2/as3722_init.h +++ b/board/nvidia/venice2/as3722_init.h @@ -18,14 +18,14 @@ #define AS3722_LDO6VOLTAGE_REG 0x16 /* VDD_SDMMC */ #define AS3722_LDCONTROL_REG 0x4E -#if defined(CONFIG_TARGET_JETSON_TK1) || defined(CONFIG_TARGET_NYAN_BIG) -#define AS3722_SD0VOLTAGE_DATA (0x3C00 | AS3722_SD0VOLTAGE_REG) -#else +#if defined(CONFIG_TARGET_VENICE2) #define AS3722_SD0VOLTAGE_DATA (0x2800 | AS3722_SD0VOLTAGE_REG) +#else /* TK1 or Nyan-Big */ +#define AS3722_SD0VOLTAGE_DATA (0x3C00 | AS3722_SD0VOLTAGE_REG) #endif #define AS3722_SD0CONTROL_DATA (0x0100 | AS3722_SDCONTROL_REG) -#ifdef CONFIG_TARGET_JETSON_TK1 +#if defined(CONFIG_TARGET_JETSON_TK1) || defined(CONFIG_TARGET_CEI_TK1_SOM) #define AS3722_SD1VOLTAGE_DATA (0x2800 | AS3722_SD1VOLTAGE_REG) #define AS3722_SD1CONTROL_DATA (0x0200 | AS3722_SDCONTROL_REG) #endif |