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authorMiquel Raynal <miquel.raynal@bootlin.com>2019-10-03 19:50:03 +0200
committerTom Rini <trini@konsulko.com>2019-12-03 23:04:10 -0500
commit88718be3001055fa2801a44ab10570279b3f2cb7 (patch)
treeec3825f5e8c3efd226917fa2745fac26c0d5c88e /board/phytec
parent94d022bb400890f22fe35220d2519c3bce73f05e (diff)
mtd: rename CONFIG_NAND -> CONFIG_MTD_RAW_NAND
Add more clarity by changing the Kconfig entry name. Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> [trini: Re-run migration, update a few more cases] Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Boris Brezillon <boris.brezillon@bootlin.com>
Diffstat (limited to 'board/phytec')
-rw-r--r--board/phytec/pcm051/mux.c4
-rw-r--r--board/phytec/phycore_am335x_r2/mux.c4
2 files changed, 4 insertions, 4 deletions
diff --git a/board/phytec/pcm051/mux.c b/board/phytec/pcm051/mux.c
index 6e9c3d257c..9bca8eae9f 100644
--- a/board/phytec/pcm051/mux.c
+++ b/board/phytec/pcm051/mux.c
@@ -82,7 +82,7 @@ static struct module_pin_mux cbmux_pin_mux[] = {
{-1},
};
-#ifdef CONFIG_NAND
+#ifdef CONFIG_MTD_RAW_NAND
static struct module_pin_mux nand_pin_mux[] = {
{OFFSET(gpmc_ad0), (MODE(0) | PULLUP_EN | RXACTIVE)}, /* NAND AD0 */
{OFFSET(gpmc_ad1), (MODE(0) | PULLUP_EN | RXACTIVE)}, /* NAND AD1 */
@@ -118,7 +118,7 @@ void enable_board_pin_mux()
configure_module_pin_mux(rmii1_pin_mux);
configure_module_pin_mux(mmc0_pin_mux);
configure_module_pin_mux(cbmux_pin_mux);
-#ifdef CONFIG_NAND
+#ifdef CONFIG_MTD_RAW_NAND
configure_module_pin_mux(nand_pin_mux);
#endif
#ifdef CONFIG_SPI
diff --git a/board/phytec/phycore_am335x_r2/mux.c b/board/phytec/phycore_am335x_r2/mux.c
index 5fd452e66d..7091c985ba 100644
--- a/board/phytec/phycore_am335x_r2/mux.c
+++ b/board/phytec/phycore_am335x_r2/mux.c
@@ -72,7 +72,7 @@ static struct module_pin_mux cbmux_pin_mux[] = {
{-1},
};
-#ifdef CONFIG_NAND
+#ifdef CONFIG_MTD_RAW_NAND
static struct module_pin_mux nand_pin_mux[] = {
{OFFSET(gpmc_ad0), (MODE(0) | PULLUP_EN | RXACTIVE)}, /* NAND AD0 */
{OFFSET(gpmc_ad1), (MODE(0) | PULLUP_EN | RXACTIVE)}, /* NAND AD1 */
@@ -108,7 +108,7 @@ void enable_board_pin_mux(void)
configure_module_pin_mux(rmii1_pin_mux);
configure_module_pin_mux(mmc0_pin_mux);
configure_module_pin_mux(cbmux_pin_mux);
-#ifdef CONFIG_NAND
+#ifdef CONFIG_MTD_RAW_NAND
configure_module_pin_mux(nand_pin_mux);
#endif
#ifdef CONFIG_SPI