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authorTom Rini <trini@konsulko.com>2019-05-07 09:38:00 -0400
committerTom Rini <trini@konsulko.com>2019-05-07 09:38:00 -0400
commit8d7f06bbbef16f172cd5e9c4923cdcebe16b8980 (patch)
tree9eede4d05f489c95c1330d6ab60a5d4c4425df42 /board/renesas/grpeach/grpeach.c
parent6984044d0516d855ec621fff741f372932d28669 (diff)
parentba932bc846e8f44b7b61fcaac41e0be907d1303e (diff)
Merge branch 'master' of git://git.denx.de/u-boot-sh
- RZ/A1 addition. - Old board removal.
Diffstat (limited to 'board/renesas/grpeach/grpeach.c')
-rw-r--r--board/renesas/grpeach/grpeach.c52
1 files changed, 52 insertions, 0 deletions
diff --git a/board/renesas/grpeach/grpeach.c b/board/renesas/grpeach/grpeach.c
new file mode 100644
index 0000000000..4f901eea71
--- /dev/null
+++ b/board/renesas/grpeach/grpeach.c
@@ -0,0 +1,52 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Copyright (C) 2017 Renesas Electronics
+ * Copyright (C) Chris Brandt
+ */
+
+#include <common.h>
+#include <asm/io.h>
+#include <asm/arch/sys_proto.h>
+
+#define RZA1_WDT_BASE 0xfcfe0000
+#define WTCSR 0x00
+#define WTCNT 0x02
+#define WRCSR 0x04
+
+DECLARE_GLOBAL_DATA_PTR;
+
+int board_init(void)
+{
+ gd->bd->bi_boot_params = (CONFIG_SYS_SDRAM_BASE + 0x100);
+
+ return 0;
+}
+
+int dram_init(void)
+{
+ if (fdtdec_setup_mem_size_base() != 0)
+ return -EINVAL;
+
+ return 0;
+}
+
+int dram_init_banksize(void)
+{
+ fdtdec_setup_memory_banksize();
+
+ return 0;
+}
+
+void reset_cpu(ulong addr)
+{
+ /* Dummy read (must read WRCSR:WOVF at least once before clearing) */
+ readb(RZA1_WDT_BASE + WRCSR);
+
+ writew(0xa500, RZA1_WDT_BASE + WRCSR);
+ writew(0x5a5f, RZA1_WDT_BASE + WRCSR);
+ writew(0x5a00, RZA1_WDT_BASE + WTCNT);
+ writew(0xa578, RZA1_WDT_BASE + WTCSR);
+
+ for (;;)
+ asm volatile("wfi");
+}