diff options
author | Marek Vasut <marek.vasut@gmail.com> | 2017-09-15 21:12:18 +0200 |
---|---|---|
committer | Nobuhiro Iwamatsu <iwamatsu@nigauri.org> | 2017-09-24 14:12:07 +0900 |
commit | 667d13fbfa0cc75eafcb3fb6d764b91bf07be9f8 (patch) | |
tree | a4efef4df6d41ec0710af92b7bce1dbfc4968b4a /board/renesas/salvator-x | |
parent | 891ac390b832d365426479f4da8cc3a14165e9b9 (diff) |
ARM: rmobile: Remove SD clock configuration from board files
The configuration is now fully performed by the SD and clk drivers,
so remove it from the board file.
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Diffstat (limited to 'board/renesas/salvator-x')
-rw-r--r-- | board/renesas/salvator-x/salvator-x.c | 18 |
1 files changed, 0 insertions, 18 deletions
diff --git a/board/renesas/salvator-x/salvator-x.c b/board/renesas/salvator-x/salvator-x.c index 37fcbbd448..9718a49d59 100644 --- a/board/renesas/salvator-x/salvator-x.c +++ b/board/renesas/salvator-x/salvator-x.c @@ -51,17 +51,8 @@ void s_init(void) #define SCIF2_MSTP310 BIT(10) /* SCIF2 */ #define ETHERAVB_MSTP812 BIT(12) #define DVFS_MSTP926 BIT(26) -#define SD0_MSTP314 BIT(14) -#define SD1_MSTP313 BIT(13) -#define SD2_MSTP312 BIT(12) /* either MMC0 */ -#define SD3_MSTP311 BIT(11) /* either MMC1 */ #define HSUSB_MSTP704 BIT(4) /* HSUSB */ -#define SD0CKCR 0xE6150074 -#define SD1CKCR 0xE6150078 -#define SD2CKCR 0xE6150268 -#define SD3CKCR 0xE615026C - int board_early_init_f(void) { /* TMU0,1 */ /* which use ? */ @@ -70,15 +61,6 @@ int board_early_init_f(void) mstp_clrbits_le32(MSTPSR3, SMSTPCR3, SCIF2_MSTP310); /* EHTERAVB */ mstp_clrbits_le32(MSTPSR8, SMSTPCR8, ETHERAVB_MSTP812); - /* eMMC */ - mstp_clrbits_le32(MSTPSR3, SMSTPCR3, SD1_MSTP313 | SD2_MSTP312); - /* SDHI0, 3 */ - mstp_clrbits_le32(MSTPSR3, SMSTPCR3, SD0_MSTP314 | SD3_MSTP311); - - writel(1, SD0CKCR); - writel(1, SD1CKCR); - writel(1, SD2CKCR); - writel(1, SD3CKCR); #if defined(CONFIG_SYS_I2C) && defined(CONFIG_SYS_I2C_SH) /* DVFS for reset */ |