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authorwdenk <wdenk>2003-08-05 17:43:17 +0000
committerwdenk <wdenk>2003-08-05 17:43:17 +0000
commitbdccc4fedcf9c5fc1f06e8f833d792198c9d04ae (patch)
tree00c1b93f6731d838eae4f8f688d4f95c14471d0a /board/sc520_cdp/sc520_cdp.c
parent96dd9af4c7c5669924c2e40734b246f207b9a8b4 (diff)
* Map ISP1362 USB OTG controller for NSCU board
* Patch by Brad Parker, 02 Aug 2003: fix sc520_cdp problems * Implement Boot Cycle Detection (Req. 2.3 of OSDL CGL Reqirements) * Allow erase command to cross flash bank boundaries
Diffstat (limited to 'board/sc520_cdp/sc520_cdp.c')
-rw-r--r--board/sc520_cdp/sc520_cdp.c21
1 files changed, 20 insertions, 1 deletions
diff --git a/board/sc520_cdp/sc520_cdp.c b/board/sc520_cdp/sc520_cdp.c
index 0fc836c629..cd52324826 100644
--- a/board/sc520_cdp/sc520_cdp.c
+++ b/board/sc520_cdp/sc520_cdp.c
@@ -28,7 +28,7 @@
#include <asm/pci.h>
#include <asm/ic/sc520.h>
#include <asm/ic/ali512x.h>
-#include <ssi.h>
+#include <spi.h>
#undef SC520_CDP_DEBUG
@@ -557,6 +557,19 @@ void ssi_chip_select(int dev)
}
}
+void spi_eeprom_probe(int x)
+{
+}
+
+int spi_eeprom_read(int x, int offset, char *buffer, int len)
+{
+ return 0;
+}
+
+int spi_eeprom_write(int x, int offset, char *buffer, int len)
+{
+ return 0;
+}
void spi_init_f(void)
{
@@ -586,6 +599,9 @@ ssize_t spi_read(uchar *addr, int alen, uchar *buffer, int len)
#ifdef CONFIG_SC520_CDP_USE_MW
res = mw_eeprom_read(2, offset, buffer, len);
#endif
+#if !defined(CONFIG_SC520_CDP_USE_SPI) && !defined(CONFIG_SC520_CDP_USE_MW)
+ res = 0;
+#endif
return res;
}
@@ -607,5 +623,8 @@ ssize_t spi_write(uchar *addr, int alen, uchar *buffer, int len)
#ifdef CONFIG_SC520_CDP_USE_MW
res = mw_eeprom_write(2, offset, buffer, len);
#endif
+#if !defined(CONFIG_SC520_CDP_USE_SPI) && !defined(CONFIG_SC520_CDP_USE_MW)
+ res = 0;
+#endif
return res;
}