summaryrefslogtreecommitdiff
path: root/board/seeed/linkit-smart-7688
diff options
context:
space:
mode:
authorStefan Roese <sr@denx.de>2018-10-09 08:59:15 +0200
committerDaniel Schwierzeck <daniel.schwierzeck@gmail.com>2018-11-18 16:02:23 +0100
commit8bd197770621df19e3eacd3ef83f9616b15b126f (patch)
tree0a4eca277efb029f4ec32f1f6bcc5b3509892373 /board/seeed/linkit-smart-7688
parent78e25171856869755fcd7518cdf1e7c42b9c7168 (diff)
mips: mt76xx: linkit-smart-7688: Use ioremap_nocache to get address
Use the correct function to get the uncached address to access the SoC registers. Signed-off-by: Stefan Roese <sr@denx.de> Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Diffstat (limited to 'board/seeed/linkit-smart-7688')
-rw-r--r--board/seeed/linkit-smart-7688/board.c7
1 files changed, 5 insertions, 2 deletions
diff --git a/board/seeed/linkit-smart-7688/board.c b/board/seeed/linkit-smart-7688/board.c
index a28abc00b8..d3d3d50c2c 100644
--- a/board/seeed/linkit-smart-7688/board.c
+++ b/board/seeed/linkit-smart-7688/board.c
@@ -6,12 +6,15 @@
#include <common.h>
#include <asm/io.h>
-#define MT76XX_GPIO1_MODE 0xb0000060
+#define MT76XX_GPIO1_MODE 0x10000060
void board_debug_uart_init(void)
{
+ void __iomem *gpio_mode;
+
/* Select UART2 mode instead of GPIO mode (default) */
- clrbits_le32((void __iomem *)MT76XX_GPIO1_MODE, GENMASK(27, 26));
+ gpio_mode = ioremap_nocache(MT76XX_GPIO1_MODE, 0x100);
+ clrbits_le32(gpio_mode, GENMASK(27, 26));
}
int board_early_init_f(void)