diff options
| author | Joel Johnson <mrjoel@lixil.net> | 2020-03-23 14:21:34 -0600 |
|---|---|---|
| committer | Stefan Roese <sr@denx.de> | 2020-04-14 13:16:42 +0200 |
| commit | 009d4cfcf27f9b3bc5fbb2f53731e6c59015aa33 (patch) | |
| tree | e49e388b865f7a620b9481c16d72c988f95ac21f /board/solidrun/clearfog | |
| parent | 8a86308a87d32b289eff0b6f89de1dea466bae9b (diff) | |
arm: mvebu: clearfog: Add SATA mode flags
The mPCIe slots on ClearFog Pro and ClearFog Base may be alternately
configured for SATA usage.
Signed-off-by: Joel Johnson <mrjoel@lixil.net>
Reviewed-by: Stefan Roese <sr@denx.de>
Diffstat (limited to 'board/solidrun/clearfog')
| -rw-r--r-- | board/solidrun/clearfog/Kconfig | 17 | ||||
| -rw-r--r-- | board/solidrun/clearfog/clearfog.c | 14 |
2 files changed, 31 insertions, 0 deletions
diff --git a/board/solidrun/clearfog/Kconfig b/board/solidrun/clearfog/Kconfig index c910e17093..44224d903d 100644 --- a/board/solidrun/clearfog/Kconfig +++ b/board/solidrun/clearfog/Kconfig @@ -15,6 +15,23 @@ config TARGET_CLEARFOG_BASE detection via additional EEPROM hardware. This option enables selecting the Base variant for older hardware revisions. +config CLEARFOG_CON3_SATA + bool "Use CON3 slot in SATA mode" + help + Use the CON3 port with SATA protocol instead of the default PCIe. + The ClearFog port allows usage of either mSATA or miniPCIe + modules, but the desired protocol must be configured at build + time since it affects the SerDes topology layout. + +config CLEARFOG_CON2_SATA + bool "Use CON2 slot in SATA mode" + depends on !TARGET_CLEARFOG_BASE + help + Use the CON2 port with SATA protocol instead of the default PCIe. + The ClearFog port allows usage of either mSATA or miniPCIe + modules, but the desired protocol must be configured at build + time since it affects the SerDes topology layout. + config CLEARFOG_SFP_25GB bool "Enable 2.5 Gbps mode for SFP" help diff --git a/board/solidrun/clearfog/clearfog.c b/board/solidrun/clearfog/clearfog.c index 8f3e5dc6a3..fd9bd95a15 100644 --- a/board/solidrun/clearfog/clearfog.c +++ b/board/solidrun/clearfog/clearfog.c @@ -67,6 +67,20 @@ int hws_board_topology_load(struct serdes_map **serdes_map_array, u8 *count) if (IS_ENABLED(CONFIG_CLEARFOG_SFP_25GB)) board_serdes_map[5].serdes_speed = SERDES_SPEED_3_125_GBPS; + if (IS_ENABLED(CONFIG_CLEARFOG_CON2_SATA)) { + board_serdes_map[4].serdes_type = SATA2; + board_serdes_map[4].serdes_speed = SERDES_SPEED_3_GBPS; + board_serdes_map[4].serdes_mode = SERDES_DEFAULT_MODE; + board_serdes_map[4].swap_rx = 1; + } + + if (IS_ENABLED(CONFIG_CLEARFOG_CON3_SATA)) { + board_serdes_map[2].serdes_type = SATA1; + board_serdes_map[2].serdes_speed = SERDES_SPEED_3_GBPS; + board_serdes_map[2].serdes_mode = SERDES_DEFAULT_MODE; + board_serdes_map[2].swap_rx = 1; + } + /* Apply runtime detection changes */ if (sr_product_is(&cf_tlv_data, "Clearfog GTR")) { board_serdes_map[0].serdes_type = PEX0; |