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authorMasahiro Yamada <yamada.m@jp.panasonic.com>2014-08-06 12:59:52 +0900
committerTom Rini <trini@ti.com>2014-08-21 12:01:12 -0400
commitd1a4aafd71991a3ddff97f7b6ec91b0952e2f4b6 (patch)
tree595e5f3d26c97a4be8f3627046d6c8ac61f0c433 /board/svm_sc8xx/svm_sc8xx.c
parent0ace4d9d8f33c54611af9f9b786696305aef97c3 (diff)
powerpc: mpc8xx: remove svm_sc8xx board
This board has been orphaned for a while and old enough. Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
Diffstat (limited to 'board/svm_sc8xx/svm_sc8xx.c')
-rw-r--r--board/svm_sc8xx/svm_sc8xx.c144
1 files changed, 0 insertions, 144 deletions
diff --git a/board/svm_sc8xx/svm_sc8xx.c b/board/svm_sc8xx/svm_sc8xx.c
deleted file mode 100644
index 5db48506c6..0000000000
--- a/board/svm_sc8xx/svm_sc8xx.c
+++ /dev/null
@@ -1,144 +0,0 @@
-/*
- * (C) Copyright 2000, 2001, 2002
- * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
- *
- * SPDX-License-Identifier: GPL-2.0+
- */
-
-#include <common.h>
-#include <mpc8xx.h>
-
-/* ------------------------------------------------------------------------- */
-const uint sdram_table[] =
-{
-/*-----------------
- UPM A contents:
------------------ */
-/*---------------------------------------------------
- Read Single Beat Cycle. Offset 0 in the RAM array.
----------------------------------------------------- */
-0x1f07fc04, 0xeeaefc04, 0x11adfc04, 0xefbbbc00 ,
-0x1ff77c47, 0x1ff77c35, 0xefeabc34, 0x1fb57c35 ,
-/*------------------------------------------------
- Read Burst Cycle. Offset 0x8 in the RAM array.
------------------------------------------------- */
-0x1f07fc04, 0xeeaefc04, 0x10adfc04, 0xf0affc00,
-0xf0affc00, 0xf1affc00, 0xefbbbc00, 0x1ff77c47,
-0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff,
-0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff,
-/*-------------------------------------------------------
- Write Single Beat Cycle. Offset 0x18 in the RAM array
-------------------------------------------------------- */
-0x1f27fc04, 0xeeaebc00, 0x01b93c04, 0x1ff77c47 ,
-0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff ,
-/*-------------------------------------------------
- Write Burst Cycle. Offset 0x20 in the RAM array
-------------------------------------------------- */
-0x1f07fc04, 0xeeaebc00, 0x10ad7c00, 0xf0affc00,
-0xf0affc00, 0xe1bbbc04, 0x1ff77c47, 0xffffffff,
-0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff ,
-0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff ,
-/*------------------------------------------------------------------------
- Periodic Timer Expired. For DRAM refresh. Offset 0x30 in the RAM array
------------------------------------------------------------------------- */
-0x1ff5fc84, 0xfffffc04, 0xfffffc04, 0xfffffc04,
-0xfffffc84, 0xfffffc07, 0xffffffff, 0xffffffff,
-0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff ,
-/*-----------
-* Exception:
-* ----------- */
-0x7ffefc07, 0xffffffff, 0xffffffff, 0xffffffff ,
-};
-
-/* ------------------------------------------------------------------------- */
-/*
- * Check Board Identity:
- *
- * Test ID string (SVM8...)
- *
- * Return 1 for "SC8xx" type, 0 else.
- */
-
-int checkboard(void)
-{
- char buf[64];
- int i;
- int l = getenv_f("serial#", buf, sizeof(buf));
-
- if (l < 0 || strncmp(buf, "SVM8", 4)) {
- printf("### No HW ID - assuming SVM SC8xx\n");
- return (0);
- }
-
- for (i = 0; i < l; ++i) {
- if (buf[i] == ' ')
- break;
- putc(buf[i]);
- }
-
- putc('\n');
-
- return 0;
-}
-
-/* ------------------------------------------------------------------------- */
-
-phys_size_t initdram (int board_type)
-{
- volatile immap_t *immap = (immap_t *)CONFIG_SYS_IMMR;
- volatile memctl8xx_t *memctl = &immap->im_memctl;
- long int size_b0 = 0;
-
- upmconfig(UPMA, (uint *)sdram_table, sizeof(sdram_table)/sizeof(uint));
-
- memctl->memc_mptpr = CONFIG_SYS_MPTPR;
-#if defined (CONFIG_SDRAM_16M)
- memctl->memc_mamr = 0x00802114 | CONFIG_SYS_MxMR_PTx;
- memctl->memc_mcr = 0x80002105; /* SDRAM bank 0 */
- udelay(1);
- memctl->memc_mcr = 0x80002830;
- udelay(1);
- memctl->memc_mar = 0x00000088;
- udelay(1);
- memctl->memc_mcr = 0x80002106;
- udelay(1);
- memctl->memc_or1 = 0xff000a00;
- size_b0 = 0x01000000;
-#elif defined (CONFIG_SDRAM_32M)
- memctl->memc_mamr = 0x00904114 | CONFIG_SYS_MxMR_PTx;
- memctl->memc_mcr = 0x80002105; /* SDRAM bank 0 */
- udelay(1);
- memctl->memc_mcr = 0x80002830;
- udelay(1);
- memctl->memc_mar = 0x00000088;
- udelay(1);
- memctl->memc_mcr = 0x80002106;
- udelay(1);
- memctl->memc_or1 = 0xfe000a00;
- size_b0 = 0x02000000;
-#elif defined (CONFIG_SDRAM_64M)
- memctl->memc_mamr = 0x00a04114 | CONFIG_SYS_MxMR_PTx;
- memctl->memc_mcr = 0x80002105; /* SDRAM bank 0 */
- udelay(1);
- memctl->memc_mcr = 0x80002830;
- udelay(1);
- memctl->memc_mar = 0x00000088;
- udelay(1);
- memctl->memc_mcr = 0x80002106;
- udelay(1);
- memctl->memc_or1 = 0xfc000a00;
- size_b0 = 0x04000000;
-#else
-#error SDRAM size configuration missing.
-#endif
- memctl->memc_br1 = 0x00000081;
- udelay(200);
- return (size_b0 );
-}
-
-#if defined(CONFIG_CMD_DOC)
-void doc_init (void)
-{
- doc_probe (CONFIG_SYS_DOC_BASE);
-}
-#endif