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authorAlexey Brodkin <abrodkin@synopsys.com>2018-02-21 12:58:00 +0300
committerAlexey Brodkin <abrodkin@synopsys.com>2018-03-21 16:21:34 +0300
commit71621525c3bf9ed2a73446ba505ad5b980b6b8bb (patch)
tree1309125801fb453076652c375beb729950f18b5d /board/tcl/sl50
parent264d298fda39c5caa9505702b257a1f60c3b7352 (diff)
arc: Fine-tune implementation of memory barriers
We improve on 2 things: 1. Only ARC HS family has "dmb" instructions so do compile-time check for automatically defined macro __ARCHS__. Previous check for ARCv2 ISA was not good enough because ARC EM family is v2 ISA as well but still "dmb" instaruction is not supported in EM family. 2. Still if there's no dedicated instruction for memory barrier let's at least insert compile-time barrier to make sure compiler deosn't reorder critical memory operations. Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
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