diff options
| author | Sourav Poddar <sourav.poddar@ti.com> | 2013-12-21 12:50:08 +0530 |
|---|---|---|
| committer | Jagannadha Sutradharudu Teki <jaganna@xilinx.com> | 2014-02-18 22:41:09 +0530 |
| commit | ea4c7a8321427dd9d579fd449e32b1dcb066dab7 (patch) | |
| tree | 30be24eb2bccd5a517ed9c86cd919ea6a0d9685d /board/ti/am43xx/mux.c | |
| parent | b56e71e2d41f4921ba69531978d4857bbd9366fa (diff) | |
am437x_epos_evm: add SPL API, QSPI, and serial flash support
Enables support for SPI SPL, QSPI and Spansion serial flash device
on the EVM. Configures pin muxes for QSPI mode.
Signed-off-by: Sourav Poddar <sourav.poddar@ti.com>
Reviewed-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
Diffstat (limited to 'board/ti/am43xx/mux.c')
| -rw-r--r-- | board/ti/am43xx/mux.c | 11 |
1 files changed, 11 insertions, 0 deletions
diff --git a/board/ti/am43xx/mux.c b/board/ti/am43xx/mux.c index 810b1941db..f96c56f886 100644 --- a/board/ti/am43xx/mux.c +++ b/board/ti/am43xx/mux.c @@ -38,6 +38,16 @@ static struct module_pin_mux gpio0_22_pin_mux[] = { {-1}, }; +static struct module_pin_mux qspi_pin_mux[] = { + {OFFSET(gpmc_csn0), (MODE(3) | PULLUP_EN | RXACTIVE)}, /* QSPI_CS0 */ + {OFFSET(gpmc_csn3), (MODE(2) | PULLUP_EN | RXACTIVE)}, /* QSPI_CLK */ + {OFFSET(gpmc_advn_ale), (MODE(3) | PULLUP_EN | RXACTIVE)}, /* QSPI_D0 */ + {OFFSET(gpmc_oen_ren), (MODE(3) | PULLUP_EN | RXACTIVE)}, /* QSPI_D1 */ + {OFFSET(gpmc_wen), (MODE(3) | PULLUP_EN | RXACTIVE)}, /* QSPI_D2 */ + {OFFSET(gpmc_be0n_cle), (MODE(3) | PULLUP_EN | RXACTIVE)}, /* QSPI_D3 */ + {-1}, +}; + void enable_uart0_pin_mux(void) { configure_module_pin_mux(uart0_pin_mux); @@ -50,6 +60,7 @@ void enable_board_pin_mux(void) if (board_is_gpevm()) configure_module_pin_mux(gpio0_22_pin_mux); + configure_module_pin_mux(qspi_pin_mux); } void enable_i2c0_pin_mux(void) |