Merge branch 'master' of git://git.denx.de/u-boot-arm

10 files changed, 63 insertions, 35 deletions

diff --git a/board/ti/am335x/board.c b/board/ti/am335x/board.c
index 12620bb69c..b371376bc7 100644
--- a/board/ti/am335x/board.c
+++ b/board/ti/am335x/board.c
@@ -379,7 +379,7 @@ void s_init(void)
 		config_ddr(303, MT41J128MJT125_IOCTRL_VALUE, &ddr3_data,
 			   &ddr3_cmd_ctrl_data, &ddr3_emif_reg_data, 0);
 	else if (board_is_bone_lt())
-		config_ddr(303, MT41K256M16HA125E_IOCTRL_VALUE,
+		config_ddr(400, MT41K256M16HA125E_IOCTRL_VALUE,
 			   &ddr3_beagleblack_data,
 			   &ddr3_beagleblack_cmd_ctrl_data,
 			   &ddr3_beagleblack_emif_reg_data, 0);
diff --git a/board/ti/omap2420h4/config.mk b/board/ti/omap2420h4/config.mk
index ca5ebdf96a..e5dff69a15 100644
--- a/board/ti/omap2420h4/config.mk
+++ b/board/ti/omap2420h4/config.mk
@@ -14,7 +14,7 @@
 # (mem base + reserved)
 
 # For use with external or internal boots.
-CONFIG_SYS_TEXT_BASE = 0x80e80000
+#CONFIG_SYS_TEXT_BASE = 0x80e80000
 
 # Used with full SRAM boot.
 # This is either with a GP system or a signed boot image.
@@ -24,5 +24,5 @@ CONFIG_SYS_TEXT_BASE = 0x80e80000
 
 # Handy to get symbols to debug ROM version.
 #CONFIG_SYS_TEXT_BASE = 0x0
-#CONFIG_SYS_TEXT_BASE = 0x08000000
+CONFIG_SYS_TEXT_BASE = 0x08000000
 #CONFIG_SYS_TEXT_BASE = 0x04000000
diff --git a/board/ti/omap2420h4/mem.c b/board/ti/omap2420h4/mem.c
index c8b4186dc8..ba3f12aded 100644
--- a/board/ti/omap2420h4/mem.c
+++ b/board/ti/omap2420h4/mem.c
@@ -200,19 +200,6 @@ void do_sdrc_init(u32 offset, u32 early)
 
 	__asm__ __volatile__("": : :"memory");  /* limit compiler scope */
 
-	/* u-boot is compiled to run in DDR or SRAM at 8xxxxxxx or 4xxxxxxx.
-	 * If we are running in flash prior to relocation and we use data
-	 * here which is not pc relative we need to get the address correct.
-	 * We need to find the current flash mapping to dress up the initial
-	 * pointer load.  As long as this is const data we should be ok.
-	 */
-	if((early) && running_in_flash()){
-		sdata = (sdrc_data_t *)(((u32)sdata & 0x0003FFFF) | get_gpmc0_base());
-		/* NOR internal boot offset is 0x4000 from xloader signature */
-		if(running_from_internal_boot())
-			sdata = (sdrc_data_t *)((u32)sdata + 0x4000);
-	}
-
 	if (!early && (((mtype = get_mem_type()) == DDR_COMBO)||(mtype == DDR_STACKED))) {
 		if(mtype == DDR_COMBO){
 			pmask = BIT2;/* combo part has a shared CKE signal, can't use feature */
diff --git a/board/ti/omap2420h4/omap2420h4.c b/board/ti/omap2420h4/omap2420h4.c
index 188e4acc09..532e989bac 100644
--- a/board/ti/omap2420h4/omap2420h4.c
+++ b/board/ti/omap2420h4/omap2420h4.c
@@ -190,10 +190,10 @@ void ether_init (void)
  * Routine: dram_init
  * Description: sets uboots idea of sdram size
  **********************************************/
-int dram_init (void)
+int dram_init(void)
 {
 	unsigned int size0=0,size1=0;
-	u32 mtype, btype, rev;
+	u32 mtype, btype;
 	u8 chg_on = 0x5; /* enable charge of back up battery */
 	u8 vmode_on = 0x8C;
 	#define NOT_EARLY 0
@@ -202,7 +202,6 @@ int dram_init (void)
 
 	btype = get_board_type();
 	mtype = get_mem_type();
-	rev = get_cpu_rev();
 
 	display_board_info(btype);
 	if (btype == BOARD_H4_MENELAUS){
@@ -217,15 +216,28 @@ int dram_init (void)
 	size0 = get_sdr_cs_size(SDRC_CS0_OSET);
 	size1 = get_sdr_cs_size(SDRC_CS1_OSET);
 
-	gd->bd->bi_dram[0].start = PHYS_SDRAM_1;
-	gd->bd->bi_dram[0].size = size0;
+	gd->ram_size = get_ram_size((long *)PHYS_SDRAM_1, size0 + size1);
+
+	return 0;
+}
+
+void dram_init_banksize(void)
+{
+	unsigned int size0, size1;
+	u32 rev;
+
+	rev = get_cpu_rev();
+	size0 = get_sdr_cs_size(SDRC_CS0_OSET);
+	size1 = get_sdr_cs_size(SDRC_CS1_OSET);
+
 	if(rev == CPU_2420_2422_ES1) /* ES1's 128MB remap granularity isn't worth doing */
 		gd->bd->bi_dram[1].start = PHYS_SDRAM_2;
 	else /* ES2 and above can remap at 32MB granularity */
 		gd->bd->bi_dram[1].start = PHYS_SDRAM_1+size0;
 	gd->bd->bi_dram[1].size = size1;
 
-	return 0;
+	gd->bd->bi_dram[0].start = PHYS_SDRAM_1;
+	gd->bd->bi_dram[0].size = size0;
 }
 
 /**********************************************************
diff --git a/board/ti/omap5912osk/config.mk b/board/ti/omap5912osk/config.mk
index 0ed7d8a6a7..5b8d952ba6 100644
--- a/board/ti/omap5912osk/config.mk
+++ b/board/ti/omap5912osk/config.mk
@@ -14,17 +14,17 @@
 # TI OSK board with OMAP5912 (ARM925EJS) cpu
 # see http://www.ti.com/ for more information on Texas Instruments
 #
-# OSK has 1 bank of 256 MB SDRAM
+# OSK has 1 bank of 32 MB SDRAM
 # Physical Address:
-# 1000'0000 to 2000'0000
+# 1000'0000 to 1200'0000
 #
 #
 # Linux-Kernel is expected to be at 1000'8000, entry 1000'8000
 # (mem base + reserved)
 #
-# we load ourself to 1108'0000
+# When running from RAM use address 1108'0000, otherwise when
+# booting from NOR flash link to address 0000'0000.
 #
-#
-
 
-CONFIG_SYS_TEXT_BASE = 0x11080000
+CONFIG_SYS_TEXT_BASE = 0x00000000
+#CONFIG_SYS_TEXT_BASE = 0x11080000
diff --git a/board/ti/omap5912osk/lowlevel_init.S b/board/ti/omap5912osk/lowlevel_init.S
index e60161ebaf..ca7361e05a 100644
--- a/board/ti/omap5912osk/lowlevel_init.S
+++ b/board/ti/omap5912osk/lowlevel_init.S
@@ -306,6 +306,23 @@ common_tc:
 	ldr	r1,	VAL_MPU_CNTL_TIMER
 	str	r1,	[r0]
 
+	/*
+	 * Setup a temporary stack
+	 */
+	ldr	sp,	SRAM_STACK
+	bic	sp, sp, #7 /* 8-byte alignment for ABI compliance */
+
+	/*
+	 * Save the old lr(passed in ip) and the current lr to stack
+	 */
+	push	{ip, lr}
+
+	/*
+	 * go setup pll, mux, memory
+	 */
+	bl	s_init
+	pop	{ip, pc}
+
 	/* back to arch calling code */
 	mov	pc,	lr
 
@@ -470,6 +487,9 @@ VAL_ARM_IDLECT2:
 VAL_ARM_IDLECT3:
 	.word 0x00000015
 
+SRAM_STACK:
+	.word CONFIG_SYS_INIT_SP_ADDR
+
 /* command values */
 .equ CMD_SDRAM_NOP,             0x00000000
 .equ CMD_SDRAM_PRECHARGE,       0x00000001
diff --git a/board/ti/omap5912osk/omap5912osk.c b/board/ti/omap5912osk/omap5912osk.c
index fac683a7e6..95140719aa 100644
--- a/board/ti/omap5912osk/omap5912osk.c
+++ b/board/ti/omap5912osk/omap5912osk.c
@@ -66,6 +66,14 @@ int board_init (void)
 	/* adress of boot parameters */
 	gd->bd->bi_boot_params = 0x10000100;
 
+	flash__init();
+	ether__init();
+
+	return 0;
+}
+
+void s_init(void)
+{
 	/* Configure MUX settings */
 	set_muxconf_regs ();
 	peripheral_power_enable ();
@@ -75,10 +83,6 @@ int board_init (void)
  *  ... rkw ...
  */
 	icache_enable ();
-
-	flash__init ();
-	ether__init ();
-	return 0;
 }
 
 /******************************
@@ -128,14 +132,19 @@ void ether__init (void)
  Routine:
  Description:
 ******************************/
-int dram_init (void)
+int dram_init(void)
 {
-	gd->bd->bi_dram[0].start = PHYS_SDRAM_1;
-	gd->bd->bi_dram[0].size = PHYS_SDRAM_1_SIZE;
+	gd->ram_size = get_ram_size((long *)PHYS_SDRAM_1, PHYS_SDRAM_1_SIZE);
 
 	return 0;
 }
 
+void dram_init_banksize(void)
+{
+	gd->bd->bi_dram[0].start = PHYS_SDRAM_1;
+	gd->bd->bi_dram[0].size = PHYS_SDRAM_1_SIZE;
+}
+
 /******************************************************
  Routine: set_muxconf_regs
  Description: Setting up the configuration Mux registers
diff --git a/board/ti/omap5_evm/Makefile b/board/ti/omap5_uevm/Makefile
index fa81d64bee..fa81d64bee 100644
--- a/board/ti/omap5_evm/Makefile
+++ b/board/ti/omap5_uevm/Makefile
diff --git a/board/ti/omap5_evm/evm.c b/board/ti/omap5_uevm/evm.c
index 55337c09d5..55337c09d5 100644
--- a/board/ti/omap5_evm/evm.c
+++ b/board/ti/omap5_uevm/evm.c
diff --git a/board/ti/omap5_evm/mux_data.h b/board/ti/omap5_uevm/mux_data.h
index a82795dc13..a82795dc13 100644
--- a/board/ti/omap5_evm/mux_data.h
+++ b/board/ti/omap5_uevm/mux_data.h