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authorDominik Sliwa <dominik.sliwa@toradex.com>2019-08-01 11:06:39 +0300
committerTom Warren <twarren@nvidia.com>2019-08-09 10:01:35 -0700
commit5a20adf446bc248a8db02f6d262b43b14587812d (patch)
treedd269b621a6259036be15a1ba0581d572c7d8083 /board/toradex
parentd415eab4f0abb3b9dd84c50c9ded0ff976a32a2f (diff)
apalis-tk1: remove non-essential power rails on boot
When mainline kernels reboot TK1 they use SW_RESET, that reset mode does not reset PMIC. Some rails need to be off for RAM Re-repair to work correctly. Reviewed-by: Oleksandr Suvorov <oleksandr.suvorov@toradex.com> Signed-off-by: Dominik Sliwa <dominik.sliwa@toradex.com> Signed-off-by: Igor Opaniuk <igor.opaniuk@toradex.com> Signed-off-by: Tom Warren <twarren@nvidia.com>
Diffstat (limited to 'board/toradex')
-rw-r--r--board/toradex/apalis-tk1/as3722_init.c23
1 files changed, 23 insertions, 0 deletions
diff --git a/board/toradex/apalis-tk1/as3722_init.c b/board/toradex/apalis-tk1/as3722_init.c
index bd754e5fcf..15f8dce2f1 100644
--- a/board/toradex/apalis-tk1/as3722_init.c
+++ b/board/toradex/apalis-tk1/as3722_init.c
@@ -43,6 +43,29 @@ void pmic_enable_cpu_vdd(void)
udelay(10 * 1000);
#endif
+ /*
+ * Make sure all non-fused regulators are down.
+ * That way we're in known state after software reboot from linux
+ */
+ tegra_i2c_ll_write_addr(AS3722_I2C_ADDR, 2);
+ tegra_i2c_ll_write_data(0x0003, I2C_SEND_2_BYTES);
+ udelay(10 * 1000);
+ tegra_i2c_ll_write_addr(AS3722_I2C_ADDR, 2);
+ tegra_i2c_ll_write_data(0x0004, I2C_SEND_2_BYTES);
+ udelay(10 * 1000);
+ tegra_i2c_ll_write_addr(AS3722_I2C_ADDR, 2);
+ tegra_i2c_ll_write_data(0x001b, I2C_SEND_2_BYTES);
+ udelay(10 * 1000);
+ tegra_i2c_ll_write_addr(AS3722_I2C_ADDR, 2);
+ tegra_i2c_ll_write_data(0x0014, I2C_SEND_2_BYTES);
+ udelay(10 * 1000);
+ tegra_i2c_ll_write_addr(AS3722_I2C_ADDR, 2);
+ tegra_i2c_ll_write_data(0x001a, I2C_SEND_2_BYTES);
+ udelay(10 * 1000);
+ tegra_i2c_ll_write_addr(AS3722_I2C_ADDR, 2);
+ tegra_i2c_ll_write_data(0x0019, I2C_SEND_2_BYTES);
+ udelay(10 * 1000);
+
debug("%s: Setting VDD_CPU to 1.0V via AS3722 reg 0/4D\n", __func__);
/*
* Bring up VDD_CPU via the AS3722 PMIC on the PWR I2C bus.