Merge branch 'master' of git://git.denx.de/u-boot-mpc85xx

1 files changed, 21 insertions, 49 deletions

diff --git a/board/tqc/tqm85xx/sdram.c b/board/tqc/tqm85xx/sdram.c
index 503c5e5306..b2d3185351 100644
--- a/board/tqc/tqm85xx/sdram.c
+++ b/board/tqc/tqm85xx/sdram.c
@@ -65,6 +65,7 @@ sdram_conf_t ddr_cs_conf[] = {
 #define	N_DDR_CS_CONF (sizeof(ddr_cs_conf) / sizeof(ddr_cs_conf[0]))
 
 int cas_latency (void);
+static phys_size_t sdram_setup(int);
 
 /*
  * Autodetect onboard DDR SDRAM on 85xx platforms
@@ -73,7 +74,26 @@ int cas_latency (void);
  *       so this should be extended for other future boards
  *       using this routine!
  */
-long int sdram_setup (int casl)
+phys_size_t fixed_sdram(void)
+{
+	int casl = 0;
+	phys_size_t dram_size = 0;
+
+	casl = cas_latency();
+	dram_size = sdram_setup(casl);
+	if ((dram_size == 0) && (casl != CONFIG_DDR_DEFAULT_CL)) {
+		/*
+		 * Try again with default CAS latency
+		 */
+		printf("Problem with CAS lantency, using default CL %d/10!\n",
+		       CONFIG_DDR_DEFAULT_CL);
+		dram_size = sdram_setup(CONFIG_DDR_DEFAULT_CL);
+		puts("       ");
+	}
+	return dram_size;
+}
+
+static phys_size_t sdram_setup(int casl)
 {
 	int i;
 	volatile ccsr_ddr_t *ddr = (void *)(CONFIG_SYS_MPC85xx_DDR_ADDR);
@@ -374,54 +394,6 @@ long int sdram_setup (int casl)
 	return (i < N_DDR_CS_CONF) ? ddr_cs_conf[i].size : 0;
 }
 
-phys_size_t initdram (int board_type)
-{
-	long dram_size = 0;
-	int casl;
-
-#if defined(CONFIG_DDR_DLL)
-	/*
-	 * This DLL-Override only used on TQM8540 and TQM8560
-	 */
-	{
-		volatile ccsr_gur_t *gur = (void *)(CONFIG_SYS_MPC85xx_GUTS_ADDR);
-		int i, x;
-
-		x = 10;
-
-		/*
-		 * Work around to stabilize DDR DLL
-		 */
-		gur->ddrdllcr = 0x81000000;
-		asm ("sync; isync; msync");
-		udelay (200);
-		while (gur->ddrdllcr != 0x81000100) {
-			gur->devdisr = gur->devdisr | 0x00010000;
-			asm ("sync; isync; msync");
-			for (i = 0; i < x; i++)
-				;
-			gur->devdisr = gur->devdisr & 0xfff7ffff;
-			asm ("sync; isync; msync");
-			x++;
-		}
-	}
-#endif
-
-	casl = cas_latency ();
-	dram_size = sdram_setup (casl);
-	if ((dram_size == 0) && (casl != CONFIG_DDR_DEFAULT_CL)) {
-		/*
-		 * Try again with default CAS latency
-		 */
-		printf ("Problem with CAS lantency, using default CL %d/10!\n",
-			CONFIG_DDR_DEFAULT_CL);
-		dram_size = sdram_setup (CONFIG_DDR_DEFAULT_CL);
-		puts ("       ");
-	}
-
-	return dram_size;
-}
-
 #if defined(CONFIG_SYS_DRAM_TEST)
 int testdram (void)
 {