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author | Markus Niebel <Markus.Niebel@tq-group.com> | 2017-02-03 16:25:02 +0100 |
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committer | Stefano Babic <sbabic@denx.de> | 2017-03-17 09:27:08 +0100 |
commit | 4ba811760a1a49311d838612a717ef418bbd1f66 (patch) | |
tree | 015ce12cbe6abc82f30c3665d20864141e4eee4b /board/tqc/tqma6/tqma6_mba6.c | |
parent | d5fa17e6fa15fccbe4d3345690297f5cecbd7002 (diff) |
mx6: tqma6: clear enet clk sel for mba6
we have external ref clock from phy.
Signed-off-by: Markus Niebel <Markus.Niebel@tq-group.com>
Diffstat (limited to 'board/tqc/tqma6/tqma6_mba6.c')
-rw-r--r-- | board/tqc/tqma6/tqma6_mba6.c | 5 |
1 files changed, 5 insertions, 0 deletions
diff --git a/board/tqc/tqma6/tqma6_mba6.c b/board/tqc/tqma6/tqma6_mba6.c index 6d63953014..1c5b95304b 100644 --- a/board/tqc/tqma6/tqma6_mba6.c +++ b/board/tqc/tqma6/tqma6_mba6.c @@ -114,6 +114,11 @@ static iomux_v3_cfg_t const mba6_enet_pads[] = { static void mba6_setup_iomuxc_enet(void) { + struct iomuxc *const iomuxc_regs = (struct iomuxc *)IOMUXC_BASE_ADDR; + + /* clear gpr1[ENET_CLK_SEL] for externel clock */ + clrbits_le32(&iomuxc_regs->gpr[1], IOMUXC_GPR1_ENET_CLK_SEL_MASK); + __raw_writel(IOMUX_SW_PAD_CTRL_GRP_RGMII_TERM_DISABLE, (void *)IOMUX_SW_PAD_CTRL_GRP_RGMII_TERM); __raw_writel(IOMUX_SW_PAD_CTRL_GRP_DDR_TYPE_RGMII_1P5V, |