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authorHeiko Schocher <hs@denx.de>2017-06-27 16:49:14 +0200
committerTom Rini <trini@konsulko.com>2017-07-03 17:35:28 -0400
commit98f705c9cefdfdba62c069821bbba10273a0a8ed (patch)
tree48a56e8496a9b6f5bcf523916ace5445489d79c7 /board/xes/xpedite1000/init.S
parentd4db3b86a5e090e21db710bedbbe3e50d4c56428 (diff)
powerpc: remove 4xx support
There was for long time no activity in the 4xx area. We need to go further and convert to Kconfig, but it turned out, nobody is interested anymore in 4xx, so remove it. Signed-off-by: Heiko Schocher <hs@denx.de>
Diffstat (limited to 'board/xes/xpedite1000/init.S')
-rw-r--r--board/xes/xpedite1000/init.S33
1 files changed, 0 insertions, 33 deletions
diff --git a/board/xes/xpedite1000/init.S b/board/xes/xpedite1000/init.S
deleted file mode 100644
index 9708ecc893..0000000000
--- a/board/xes/xpedite1000/init.S
+++ /dev/null
@@ -1,33 +0,0 @@
-/*
-* Copyright (C) 2002 Scott McNutt <smcnutt@artesyncp.com>
- * SPDX-License-Identifier: GPL-2.0+
-*/
-
-#include <ppc_asm.tmpl>
-#include <asm/mmu.h>
-#include <config.h>
-#include <asm/ppc4xx.h>
-
-/*
- * TLB TABLE
- *
- * This table is used by the cpu boot code to setup the initial tlb
- * entries. Rather than make broad assumptions in the cpu source tree,
- * this table lets each board set things up however they like.
- *
- * Pointer to the table is returned in r1
- */
-
- .section .bootpg,"ax"
- .globl tlbtab
-
-tlbtab:
- tlbtab_start
- tlbentry( 0xf0000000, SZ_256M, 0xf0000000, 1, AC_RWX | SA_IG)
- tlbentry( CONFIG_SYS_PERIPHERAL_BASE, SZ_256M, 0x40000000, 1, AC_RW | SA_IG)
- tlbentry( CONFIG_SYS_ISRAM_BASE, SZ_256K, 0x80000000, 0, AC_RWX | SA_IG)
- tlbentry( CONFIG_SYS_SDRAM_BASE, SZ_256M, 0x00000000, 0, AC_RWX | SA_IG )
- tlbentry( CONFIG_SYS_SDRAM_BASE+0x10000000, SZ_256M, 0x10000000, 0, AC_RWX | SA_IG )
- tlbentry( CONFIG_SYS_PCI_BASE, SZ_256M, 0x00000000, 2, AC_RW | SA_IG )
- tlbentry( CONFIG_SYS_PCI_MEMBASE, SZ_256M, 0x00000000, 3, AC_RW | SA_IG )
- tlbtab_end