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authorWolfgang Denk <wd@denx.de>2010-10-23 21:59:42 +0200
committerWolfgang Denk <wd@denx.de>2010-10-23 21:59:42 +0200
commitf2b382ea066d02d5ba44870024cc1295e85782ef (patch)
tree9891424412f40e0bbe3cb64d022597bffa301b50 /board/xes/xpedite520x/ddr.c
parent33a08c10c78baf67e41cd03d5732ddc338e8c2e9 (diff)
parentbfe18815e8123f4456be8b5858b2b255d7881698 (diff)
Merge branch 'master' of git://git.denx.de/u-boot-mpc85xx
Diffstat (limited to 'board/xes/xpedite520x/ddr.c')
-rw-r--r--board/xes/xpedite520x/ddr.c91
1 files changed, 91 insertions, 0 deletions
diff --git a/board/xes/xpedite520x/ddr.c b/board/xes/xpedite520x/ddr.c
new file mode 100644
index 0000000000..c5616d546b
--- /dev/null
+++ b/board/xes/xpedite520x/ddr.c
@@ -0,0 +1,91 @@
+/*
+ * Copyright 2008 Freescale Semiconductor, Inc.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * Version 2 as published by the Free Software Foundation.
+ */
+
+#include <common.h>
+#include <i2c.h>
+
+#include <asm/fsl_ddr_sdram.h>
+#include <asm/fsl_ddr_dimm_params.h>
+
+static void
+get_spd(ddr2_spd_eeprom_t *spd, unsigned char i2c_address)
+{
+ i2c_read(i2c_address, 0, 1, (uchar *)spd, sizeof(ddr2_spd_eeprom_t));
+
+ /* We use soldered memory, but use an SPD EEPROM to describe it.
+ * The SPD has an unspecified dimm type, but the DDR2 initialization
+ * code requires a specific type to be specified. This sets the type
+ * as a standard unregistered SO-DIMM. */
+ if (spd->dimm_type == 0) {
+ spd->dimm_type = 0x4;
+ ((uchar *)spd)[63] += 0x4;
+ }
+}
+
+unsigned int fsl_ddr_get_mem_data_rate(void)
+{
+ return get_ddr_freq(0);
+}
+
+void fsl_ddr_get_spd(ddr2_spd_eeprom_t *ctrl_dimms_spd,
+ unsigned int ctrl_num)
+{
+ unsigned int i;
+
+ if (ctrl_num) {
+ printf("%s: invalid ctrl_num = %d\n", __func__, ctrl_num);
+ return;
+ }
+
+ for (i = 0; i < CONFIG_DIMM_SLOTS_PER_CTLR; i++)
+ get_spd(&(ctrl_dimms_spd[i]), SPD_EEPROM_ADDRESS);
+}
+
+void fsl_ddr_board_options(memctl_options_t *popts,
+ dimm_params_t *pdimm,
+ unsigned int ctrl_num)
+{
+ /*
+ * Factors to consider for clock adjust:
+ * - number of chips on bus
+ * - position of slot
+ * - DDR1 vs. DDR2?
+ * - ???
+ *
+ * This needs to be determined on a board-by-board basis.
+ * 0110 3/4 cycle late
+ * 0111 7/8 cycle late
+ */
+ popts->clk_adjust = 7;
+
+ /*
+ * Factors to consider for CPO:
+ * - frequency
+ * - ddr1 vs. ddr2
+ */
+ popts->cpo_override = 9;
+
+ /*
+ * Factors to consider for write data delay:
+ * - number of DIMMs
+ *
+ * 1 = 1/4 clock delay
+ * 2 = 1/2 clock delay
+ * 3 = 3/4 clock delay
+ * 4 = 1 clock delay
+ * 5 = 5/4 clock delay
+ * 6 = 3/2 clock delay
+ */
+ popts->write_data_delay = 3;
+
+ /*
+ * Factors to consider for half-strength driver enable:
+ * - number of DIMMs installed
+ */
+ popts->half_strength_driver_enable = 0;
+}